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Recent content by horscht(i)

  1. H

    White House tells chip industry to brace for Russian supply disruptions

    Aren`t Indonesia and Philippines the largest producers of Nickel? So we could take Nickel off of the list? Edit: Cited from the article: "Neon, critical for the lasers used to make chips, is a biproduct of Russian steel manufacturing, according to Techcet." Is the article refering to HeNe...
  2. H

    The World Is Dangerously Dependent on Taiwan for Semiconductors

    I agree that the current crisis in the automotive market can - for the most part - be attributed to the different logics of automotive procurement versus semicon wafer capacity and need for utilization. Absolutely. The article Danni posted does not seem to assign guilt to TSMC, though. It just...
  3. H

    The World Is Dangerously Dependent on Taiwan for Semiconductors

    Could you elaborate where you see the misinformation?
  4. H

    Japan hits South Korea with semiconductor sanctions

    https://www.ft.com/content/1480fc96-9bab-11e9-9c06-a4640c9feebb Since it was all over the news and I could not find a proper thread yet... Japan declares Export restictions on fluorinated polyamide, photoresists and hydrogen fluoride etching gas. As anyone can tell this probably will hit...
  5. H

    NXP to buy Marvell's WiFi, Bluetooth business for $1.76 billion

    If you`d ask NXP, I´d bet they would say something like "IoT". NXP has a Long Standing history with security-hardened micro controllers for payment applications. My best guess on the synergy therefore is to provide a full connetivity solution for wireless IoT: Owning the root-of-trust within the...
  6. H

    The standard reasons for investing in your own chip design

    Not too long ago I was reading a blog post on SemiWiki, which started by listing reasons of why to invest in your own chip design. I struggle to find the article on the page. It contained the one or the other argument I did not think of myself yet. Does anyone remember and can pin point me to...
  7. H

    Mask ROM footprint and read-out times

    I am looking for numbers or at least estimation for the footprint (area per bit) and read-out times of mask ROM versus Flash in a given process. The process can be as old as 40nm or even 65nm. After googling around for an hour the only rather solid statement I could find is "As a consequence...
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