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ZeBu Empower Enables Power Verification Turnaround Within Hours Using Real-World Software Workloads for AI, 5G, Data Center and Mobile SoC Applications
MOUNTAIN VIEW, Calif., Feb. 24, 2021 /PRNewswire/ --
Highlights:
Industry's first SoC power-aware emulation system for multi-billion gate...
ASML update from SPIE. More SPIE coverage to come:
ASML shipped 85 systems in 2020. While the NXE:3600 was first announced last year, 2021 presentations will describe further improvements in availability (95%), productivity (2500 wpd) and pellicle transmission (90%), as well as matching as ASML...
I would say both. Throughput was also a problem. Those machines do not work right out of the box. A lot of effort was required to integrate EUV into the manufacturing process. There was a lot of yield learning and some secret sauce resulted. EUV is yet another way foundries will differentiate.
Even if Intel can get EUV tools, TSMC and Samsung implemented EUV in steps. For Intel to think they can go from 0 EUV to full EUV in one node and yield properly is questionable. I certainly hope they can but it is questionable.
MOUNTAIN VIEW, Calif., Feb. 23, 2021 /PRNewswire/ -- Synopsys, Inc. (Nasdaq: SNPS) today announced that Aart de Geus, chairman and co-CEO, will speak at the 2021 Virtual Morgan Stanley Technology, Media and Telecom Conference on March 2, 2021.
This event will be broadcast live on the Internet...
Massive increase in HPC application performance and interconnect speeds with high bandwidth memories and highly integrated system-on-a-chip in a multi-chip package
MAISONS-LAFFITTE, France – February 23, 2021 SiPearl, the company designing the high-performance, energy-efficient microprocessor...
Siemens’ Ballance will be honored during virtual DVCon U.S. 2021 for his contributions to the development of the Portable Test and Stimulus Standard
Elk Grove, Calif., February 23, 2021 -- Accellera Systems Initiative (Accellera) announced today that Matthew Ballance, a member of the Portable...
PLDA’s CXL Verification IP Ecosystem is intended to reduce the challenges of designing new CXL applications. By combining leading third-party VIP and PLDA’s best-in-class CXL controller IP, CXL designers will have the ability to choose the most flexible and complete solution for their SoC...
Joint Paper Presented at ISSCC 2021 Shows How New Adaptive Back-Biasing Technique
Overcomes Integration Limits in Chip Design Flows
GRENOBLE, France – Feb. 22, 2021 – CEA-Leti and Dolphin Design have developed an adaptive back-biasing (ABB) architecture for FD-SOI chips that can be seamlessly...
Santa Clara, California Feb 18, 2021 (Issuewire.com) - MosChip Technologies Limited, a semiconductor and system design services company, unveils today, focused strategy for turn-key ASIC solutions. MosChip has over a twenty-year track record in designing semiconductor IP, products, and SoCs for...
Reading UK – 22 Feb 2021 Rabat in Morocco is developing into a growing technology hub, but as it is at the early stages, there are challenges in finding staff. With only two other similar design companies in the area to try and recruit from, Sondrel has developed a different strategy of working...
Florianópolis, Brazil — February 22nd, 2021 -- Chipus Microelectronics, a semiconductor company with proven expertise in the development of ultra-low-power (ULP) semiconductor IP, announced it has joined the GLOBALFOUNDRIES® (GF®) FDXcelerator Partner Program.
GF’s FDXcelerator program enables...
The systems companies now dominate EDA revenue and they have wider need and bigger budget for tools than the traditional fabless chip companies. System companies are looking for single vendor solutions that go from top to bottom. Unfortunately that leaves out the small to medium EDA players so...
The Siemens acquisition of Mentor is now complete! I will go through the website this weekend. So far it looks great. Let me know your thoughts on the website and acquisition. As I said before, this acquisition is one for the EDA record books, absolutely. Congrats to Wally Rhines and his team...
