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Intel Reports Q3 2022 Earnings: Back To Profitability, But Still Painful

I agree, but don't really have any direct context for, that $8-10B in cost reductions in 2024/2025 sounds *enormous*. Is that personnel and then also equipment purchasing? How else does Intel cut such a massive number? And how does it keep R&D and capital spending up to support leadership chip design and an upstart IFS business if it's cutting that much spending?

Maybe Intel is so grossly bloated that this amount of cutting is truly just streamlining...
 
Pat Gelsinger was delt a very challenging hand but I think he is playing it well thus far. The next year will be telling. Industry CAPEX will be slashed for sure to avoid a capacity glut.

I'm still eagerly waiting for Intel and AMD to go head-to-head using the same TSMC N3E process. Design versus design on the same process for the first time ever. That will be the ultimate test. AMD has the advantage since they have been with TSMC since N7 but Intel has a massive design force. Let the best chip win!


PG: On Intel 4, we are progressing towards a high-volume manufacturing and will tape out the production stepping at Meteor Lake in Q4. The first stepping of Granite Rapids is out of the fab, yielding well with Intel 3 continuing to progress on schedule. Intel 4 and 3 are our first nodes deploying EUV and will represent a major step forward in terms of transistor performance per watt and density.

On Intel 20A and 18A, the first nodes to benefit from RibbonFET and PowerVia our first internal test chips, and those of a major potential foundry customer have taped out with silicon running in the fab. We continue to be on track to regain transistor performance and power performance leadership by 2025.

DAN: That customer is Qualcomm. This is a big win for IFS.

PG: IFS is a major beneficiary of our TD progress, and we are excited to welcome NVIDIA to the RAMP-C program, which enables both commercial foundry customers and the U.S. Department of Defense to take advantage of Intel's at scale investments in leading-edge technologies. Since Q2, IFS has expanded engagements to seven out of the 10 largest foundry customers, coupled with consistent pipeline growth to include 35 customer test chips. In addition, IFS increased qualified opportunities by $1 billion to over $7 billion in deal value, all before we welcome the Tower team with the expected completion of the merger in Q1 '23.

(The RAMP-C program was created to facilitate the use of a U.S.-based commercial semiconductor foundry ecosystem to fabricate the assured leading-edge custom and integrated circuits and commercial products required for critical Department of Defense systems. Intel Foundry Services, Intel’s dedicated foundry business launched this year, will lead the work.)

DN: There have been whispers that the Tower acquisition had stalled so this is good news.

Interesting Q&As:

Timothy Arcuri

I had a question on the internal foundry. It seems sort of like the first step in basically splitting the company into an external foundry and a fabless company. Can you sort of play that out? Is that the idea? And sort of how does this create value? I guess, I mean, obviously, if you look at GlobalFoundries' market cap, that's like 30% of your market cap. But how does it play out functionally, how it creates value?

Patrick Gelsinger
Yes. When we definitely view that there are efficiencies for us to gain as we go through this internal foundry model, where we see numerous areas in the company that were not as rigorous as we need to be. In factory loading, where we make lots of change in factory loadings and we would run the factories more efficiently or stepping aren't accountable, right, through cost modeling back to the business units, and thus, driving the high-quality A0 stepping. And stepping changes being fully reflected internally and the cost of those will make us more efficient. Leveraging third-party IP more aggressively will make us more efficient.

And the combination of that is a big piece of why we're stepping to this internal foundry model, and we expect that we're going to start giving more financial transparency that way so that you can start to see the benefits in the margin stacking being realized of both being a product company as well as a fab foundry company. And that's what we're out to get with the structure that we're laying out.

That said, we think that this tight coupling of the IDM 2.0 model is a powerful value generator for us, at least the three areas. One, the technology benefits that we get to have a rapid pace of technology innovation innovation and co-optimization between product and process. The second is the cash flows and balance sheet benefits that we get by having these internal to be able to drive the large investments required in the manufacturing network. And third is in the supply chain efficiency and flexibility being able to balance across the foundry and business unit structure.

So these three areas for us are ones that we see that tight coupling bringing long-term meaningful value generation to the company and to our shareholders. But we're going to do it against the backdrop that we are going to be benchmarking ourselves against the best-in-class in each area and that transparency, right? We'll provide more visibility to you, our shareholders, but also drive our teams internally. And an engineering, manufacturing team when they see benchmark that you're holding up against them, it just unleashes energy into the future. And that's the excitement that we are working to create with this internal foundry model. And as we've launched it this quarter, we're already starting to see the roots of that permeate through our teams.

C.J. Muse
And one more question on your Intel foundry strategy. It makes perfect sense to me around the discipline and cost that you're looking to achieve here. But if I'm a business unit head, and you've been pretty clear that you're playing catch up five node migrations over the next four years. If I'm a business unit head over the next two years, why would I not outsource completely? So I guess what are the guardrails to ensure that you're keeping capacity internally until you achieve the goals that you set out for 2025?

Patrick Gelsinger
Yes. Maybe three different perspectives on that C.J. Obviously, most of the design decisions that are being made by my product teams now are '25, '26, '27 decisions when we're back to process leadership, right? And they're seeing that progress day to day. And just as I said, "Hey, if you want to design the best product, have the best transistor." So they're with the capability to look now at the Intel leadership process technologies as they make those decisions.

Also, secondly, as I described, this is a tight binding and we're going to maintain that tight binding of optimization and co-optimization for relationships that are decades old between our teams, by bringing in a new discipline to the boundary between them.

And the third answer is we already use external foundries. This is a process that's already pretty well established, and we're using a range of external foundries. Our design teams over the last five years or so have learned how to use external foundries. And the fact is they're interacting now with my internal foundry, many of those learnings on expectations of PDKs, design tools, IP libraries are driving the expectations for what is required to be a good internal foundry, which will make my internal foundry a better external foundry as well. So I see this as a very regenerative cycle as we unleash these energies. And ultimately, I'm the CEO across both, and we'll be making good decisions to hold both of them accountable even as we clarify the interfaces and the efficiencies between them.

Matthew Ramsay
Yes, John. One thing that piqued my interest, Pat, in your prepared script was -- I mean there's a lot of discussion of the five nodes in four years and halfway through that transition is 20A with RibbonFET or gate all around. So you guys are going to need to go through that jump. Your competition as well.

And you mentioned, I think, some tape-outs of your own stuff but also some tape-outs of potential external foundry customers on 20A that seemed, I don't know, from the language used, kind of meaningful. So if you could give us a status report there on sort of the gate all-around RibbonFET progress you see versus competition? And is this external customer really significant.

Patrick Gelsinger
Yes. Thank you. And on 20A and 18A, they go to RibbonFET, as you say. And Intel has driven every major transistor, right, in the volume production for the last 35 years. So the idea that we're the ones who are going to drive this major new transistor structure into production is something that we're pretty committed to be a driver for 20A, as you said, on track, on schedule. We expect 20A will primarily be an internal node, not one that we have a lot of external foundry customers for the external foundry chipset or tape-outs are largely associated with 18A.

And a very typical process for a foundry customer will be "give me a test chip of my circuits on your process." and that's exactly what we take out. The first one this quarter. We'll have several more in the pipeline. So now we're taking out not only our test chips for 18A, but our foundry customer test chips for 18A, and that's a pretty critical milestone when they see the results of the silicon for them making a volume decision for a foundry customer.

So we're exactly on the time line that I described earlier for those tape-outs and those decisions. So as they start to see the silicon results, which we think are going to be very promising we think that will be a key step to them making major foundry decisions. And overall, this just affirms our five nodes in four years. We're making the investments. We're seeing good progress to get back to process technology leadership, which for Intel is a tide that raises all boats in the company. It makes our products better. It establishes our new business areas, positions us in a very profound way for foundry [Technical Difficulty]

Economic environment. Macro, very challenged, but we're happy with the execution progress we made even though we're not happy with the reported results. And we know we have a lot more work to do there.

It was also thrilling to participate with the Mobileye IPO in a tough market with very good results. We're prepared for the economic headwinds. We're making the necessary adjustments structurally as well as through our cost model to go through them. And we remain fully committed to being a value generator for our shareholders for the long term as we execute our 2.0. We believe that, that will be a great result for our owners for the long term.

Daniel Nenni
Word on the street is that QCOM and Intel are working closely on 18A. This could be a huge win for IFS. Intel 20A will be another yield learning node like Intel 4, TSMC N3, and Samsung 3nm. Let's hope all goes well for GAA and it gives us the power, performance, and density advantages that FinFETs did, absolutely.
 
It seems to me Pat Gelsinger is working hard to make Intel into two independent companies, a foundry company and a fabless product company.

From Pat Gelsinger's statement, he unintentionally revealed there are conflict of interests and challenges between theses two business divisions. Can those issues be solved by staying under the same Intel roof? The official intel's answer is a "Yes". But what they are actually doing is to make Intel splittable.
 
The biggest challenge Intel have with being a foundry is the difference in mindset and ecosystem compared to being a fab for an internal design team -- the customers (hopefully lots of them!) are king, not the fab, and to compete with TSMC they'll need not just a competitive process with good yield delivered on time -- a big wall to climb in itself -- but all the 3rd party IP that customers are looking for, because they don't want to (or can't) develop it all themselves. With TSMC they don't have to, there are a massive number of IP suppliers, and this is one of the reasons (apart from late and poor-performing processes) that Samsung have had nowhere near the foundry success that TSMC have.

If Intel deliver competitive processes on time and can build up their IP ecosystem (and customers) then they can compete with TSMC as a foundry, if not they'll be another Samsung... :-(
 
It seems to me Pat Gelsinger is working hard to make Intel into two independent companies, a foundry company and a fabless product company.

From Pat Gelsinger's statement, he unintentionally revealed there are conflict of interests and challenges between theses two business divisions. Can those issues be solved by staying under the same Intel roof? The official intel's answer is a "Yes". But what they are actually doing is to make Intel splittable.
I see what you're observing and saying, but I'd be very surprised if Intel splits. I think the real point is to get the CPU design teams to be more efficient with steppings, which are getting very expensive, and to make the manufacturing group a much better supplier to internal groups too. Previously the Intel CPU teams were captive customers, now their business has to be more earned.
 
The biggest challenge Intel have with being a foundry is the difference in mindset and ecosystem compared to being a fab for an internal design team -- the customers (hopefully lots of them!) are king, not the fab, and to compete with TSMC they'll need not just a competitive process with good yield delivered on time -- a big wall to climb in itself -- but all the 3rd party IP that customers are looking for, because they don't want to (or can't) develop it all themselves. With TSMC they don't have to, there are a massive number of IP suppliers, and this is one of the reasons (apart from late and poor-performing processes) that Samsung have had nowhere near the foundry success that TSMC have.

If Intel deliver competitive processes on time and can build up their IP ecosystem (and customers) then they can compete with TSMC as a foundry, if not they'll be another Samsung... :-(
Intel has numerous internal chip teams using external foundries, like TSMC, so they seem to understand the scope of the IP problem. I think it'll take several years to approach the portfolio TSMC has, but internalizing the challenge is the first step.

 
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Intel has numerous internal chip teams using external foundries, like TSMC, so they seem to understand the scope of the IP problem. I think it'll take serval years to approach the portfolio TSMC has, but internalizing the challenge is the first step.
I agree with you - I think the big challenge is that most third-party IP suppliers partially or completely self-fund most IP development for TSMC, at least for many of the most common nodes, because of TSMC's market presence, with TSMC supplying test chip access. My guess is that Intel is going to need to carry much of the load for funding third-party IP ports to their nodes, or rely on their new foundry customers. But maybe Intel is ready to do that in service of their existing internal design customers - from PG - "Leveraging third-party IP more aggressively will make us more efficient."
 
1. No way Intel Foundries can achieve TSMC 60% gross margin and 40% operating margin. It's a clear misleading statement. It's impossible even for TSMC USA Fabs to achieve that number.

2. " On Intel 4, we are progressing towards a high-volume manufacturing and will tape out the production stepping at Meteor Lake in Q4. The first stepping of Granite Rapids is out of the fab, yielding well with Intel 3 continuing to progress on schedule."

Do you think Pat can predict Intel 4 yield 12 month before mass production? How credible is that statement?
 
1. No way Intel Foundries can achieve TSMC 60% gross margin and 40% operating margin. It's a clear misleading statement. It's impossible even for TSMC USA Fabs to achieve that number.

2. " On Intel 4, we are progressing towards a high-volume manufacturing and will tape out the production stepping at Meteor Lake in Q4. The first stepping of Granite Rapids is out of the fab, yielding well with Intel 3 continuing to progress on schedule."

Do you think Pat can predict Intel 4 yield 12 month before mass production? How credible is that statement?
PG did not predict anything. He just said that they are "progressing".
 
1. No way Intel Foundries can achieve TSMC 60% gross margin and 40% operating margin. It's a clear misleading statement. It's impossible even for TSMC USA Fabs to achieve that number.

2. " On Intel 4, we are progressing towards a high-volume manufacturing and will tape out the production stepping at Meteor Lake in Q4. The first stepping of Granite Rapids is out of the fab, yielding well with Intel 3 continuing to progress on schedule."

Do you think Pat can predict Intel 4 yield 12 month before mass production? How credible is that statement?
1. My interpretation of this is that intel wants to have higher margins than AMD, and there is no reason this shouldn't be the case. In theory IDM gives intel a pricing advantage because they don't have to pay TSMC's 60% margin. The fact this isn't the case is disastrous. For this reason I think it is not only reasonable, but expected that intel's CCG and DCAI group margins should be around AMD's margin minus TSMC's profit.

2. Keep in mind that chips need months in the fab, months on a boat to SE Asia for packaging, time to get packaged, months to get shipped and slapped into that laptop that is getting made in the PRC or ROC, and then months to get from their warehouse to a Bestbuy near you. If Meteor Lake wasn't about to ramp then the product literally could not come out in 2023.

Also intel 3 is a half node shrink of intel 4 and a HD library, presumably if i4 is "working" than i3 should not have any major showstoppers blocking the way since they are a part of the same technological family.
 
Also intel 3 is a half node shrink of intel 4 and a HD library, presumably if i4 is "working" than i3 should not have any major showstoppers blocking the way since they are a part of the same technological family.

Intel 3 is an optimized version of Intel 4 with more EUV layers. Intel 4 is running CPU tiles not full chips so yield will be easier to predict. Intel 3 will be a full node running outside chips with IFS. It is not a slam dunk but I agree there should not be a problem. This is similar to TSMC N3 and N3E but N3E has less EUV layers.... Oooops.
 
1. My interpretation of this is that intel wants to have higher margins than AMD, and there is no reason this shouldn't be the case. In theory IDM gives intel a pricing advantage because they don't have to pay TSMC's 60% margin. The fact this isn't the case is disastrous. For this reason I think it is not only reasonable, but expected that intel's CCG and DCAI group margins should be around AMD's margin minus TSMC's profit.

2. Keep in mind that chips need months in the fab, months on a boat to SE Asia for packaging, time to get packaged, months to get shipped and slapped into that laptop that is getting made in the PRC or ROC, and then months to get from their warehouse to a Bestbuy near you. If Meteor Lake wasn't about to ramp then the product literally could not come out in 2023.

Also intel 3 is a half node shrink of intel 4 and a HD library, presumably if i4 is "working" than i3 should not have any major showstoppers blocking the way since they are a part of the same technological family.

"My interpretation of this is that intel wants to have higher margins than AMD, and there is no reason this shouldn't be the case. In theory IDM gives intel a pricing advantage because they don't have to pay TSMC's 60% margin. The fact this isn't the case is disastrous. For this reason I think it is not only reasonable, but expected that intel's CCG and DCAI group margins should be around AMD's margin minus TSMC's profit."

Although TSMC maintains a 50+% to 60% gross profit margin, it doesn't mean Intel will save some money by making chips inhouse instead of outsourcing to TSMC. The major reason is Intel's high cost and lower productivity (compare to TSMC).

Source:
Post in thread 'Semiconductor Investments Won’t Pay Off if Congress Doesn’t Fix the Talent Bottleneck' https://semiwiki.com/forum/index.ph...’t-fix-the-talent-bottleneck.15998/post-52515

If we measure the employee productivity by net profit, TSMC is significantly stronger than Intel.

2021 TSMC average net profit per employee, based on 65,000 employees and US$21.354 billion net profit for 2021:
US$ 328,523

2021 Intel average net profit per employee, based on total 121,000 employees and US$19.87 billion net profit for 2021:
US$ 164,214
 
"My interpretation of this is that intel wants to have higher margins than AMD, and there is no reason this shouldn't be the case. In theory IDM gives intel a pricing advantage because they don't have to pay TSMC's 60% margin. The fact this isn't the case is disastrous. For this reason I think it is not only reasonable, but expected that intel's CCG and DCAI group margins should be around AMD's margin minus TSMC's profit."

Although TSMC maintains a 50+% to 60% gross profit margin, it doesn't mean Intel will save some money by making chips inhouse instead of outsourcing to TSMC. The major reason is Intel's high cost and lower productivity (compare to TSMC).

Source:
Post in thread 'Semiconductor Investments Won’t Pay Off if Congress Doesn’t Fix the Talent Bottleneck' https://semiwiki.com/forum/index.php?threads/semiconductor-investments-won’t-pay-off-if-congress-doesn’t-fix-the-talent-bottleneck.15998/post-52515

If we measure the employee productivity by net profit, TSMC is significantly stronger than Intel.

2021 TSMC average net profit per employee, based on 65,000 employees and US$21.354 billion net profit for 2021:
US$ 328,523

2021 Intel average net profit per employee, based on total 121,000 employees and US$19.87 billion net profit for 2021:
US$ 164,214
This is Pat's point. There is no reason why intel should be so much more expensive than TSMC that TSMC's customers can have higher margins than intel. Granted this isn't exactly apples for apples since AMD is more reliant on the higher margin server space than intel is, and in this space they are kicking intel's butt across most workloads. However I think it is good enough to illustrate the point. There is no reason why intel's manufacturing cost should not be at least equal to or at the very least competitive with TSMC. There is also no reason why intel's products couldn't be good enough to have comparable ASPs to AMD. Unfortunately for intel neither of these things are the case right now, and that is the crux of the financial issues that intel is facing right now (ignoring the downturn that is effecting everyone right now).

While I don't have intel's books, I would assume part of the problem is that 10nm/i7 don't seem like they would be super economical. Quad patterning in the backend drastically raises process complexity and lowers throughput versus N7P/6. I wouldn't be surprised if cobalt also caused an increase in parametric fails/resulted in lower binning. Pressumbly i4 should help with this given that if it really does enter HVM this year than it would narrow the technological gap, and as we saw with their whitepaper the number of mask layers is slightly lower than 10nm.
 
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While I don't have intel's books, I would assume part of the problem is that 10nm/i7 don't seem like they would be super economical. Quad patterning in the backend drastically raises process complexity and lowers throughput versus N7/6. I wouldn't be surprised if cobalt also caused an increase in parametric fails/resulted in lower binning. Pressumbly i4 should help with this given that if it really does enter HVM this year than it would narrow the technological gap, and as we saw with their whitepaper the number of mask layers is slightly lower than 10nm.
I’m curious on this: we hear a ton about the incredible cost of the EUV machines, but to your point does the process simplification that EUV brings allow for improved margins overall? My basic understanding is it would mostly replace all this quad patterning needed by the DUV machines, and so massively improve throughput/complexity for Intel 4/3 compared to their Intel 7 process?
 
Assume 50% profit margin for Intel, AMD, and TSMC.

AMD CPU: $200, cost $100.......AMD cost $100= TSMC price........TSMC cost$50

Intel CPU:$200, Cost $100

Intel manufacturing cost may not be double of TSMC cost. The it's huge. That's why Pat had not release it at this stage.
 
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Assume 50% profit margin for Intel, AMD, and TSMC.

AMD CPU: $200, cost $100.......AMD cost $100= TSMC price........TSMC cost$50

Intel CPU:$200, Cost $100

Intel manufacturing cost may not be double of TSMC cost. The it's huge. That's why Pat had not release it at this stage.

In order for Intel to cut cost by $3 billion in 2023 and $10 billion each year in 2024 and 2025, Intel may be going the following routes:

1. To layoff more employees. But Intel needs a lot new talents to build IFS and to catch up TSMC and Samsung. There's a limitation for using this approach too often.

2. To sell or spin out less important or low margin business units, such as certain part of testing and packaging business.

3. To sell more assets then do the lease back financing or something similar. More deals structured like the Brookfield/Intel project may be coming.

4. To outsource more products to TSMC. This approach might give Intel huge cost saving and help Intel to gain competitive advantages quicker. But it will hurt the nascent Intel Foundry.
 
Assume 50% profit margin for Intel, AMD, and TSMC.

AMD CPU: $200, cost $100.......AMD cost $100= TSMC price........TSMC cost$50

Intel CPU:$200, Cost $100

Intel manufacturing cost may not be double of TSMC cost. The it's huge. That's why Pat had not release it at this stage.

I think Intel needs to make up its mind about to whom Intel is competing against, AMD, TSMC, or both.

IMO, it will be very risky and costly for Intel to compete against both AMD and TSMC. It can easily drag Intel into too many battlefields.
 
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I think Intel needs to make up its mind about to whom Intel is competing against, AMD, TSMC, or both.

IMO, it will be very risky and costly for Intel to compete against both AMD and TSMC. It can easily drag Intel into too many battlefields.
This seem like two very tightly integrated battlefields?

At least it’s a lot less battlefields than autonomous driving, and drones, and memory, and…
 
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