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Nice find Daniel. Looking through the list, I see that IC EDA and board-level design still have top-level structure, but not not so much support is apparent for logic design/verification. Emulation still has a VP, but not an EVP/SVP. Is Mentor just ceding the battle in functional verification to SNPS and CDNS?
Nice find Daniel. Looking through the list, I see that IC EDA and board-level design still have top-level structure, but not not so much support is apparent for logic design/verification. Emulation still has a VP, but not an EVP/SVP. Is Mentor just ceding the battle in functional verification to SNPS and CDNS?
After merger with Siemens PLM, too deep hierarchy if continues to keep original Mentor organization's hierarchy.So Siemens needs to eliminate Top level of Mentor and consolidate division level into IC , PCB and EDA Cable