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DTSTART;TZID=America/Los_Angeles:20260204T090000
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CREATED:20260120T225747Z
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SUMMARY:Webinar: Synopsys and TSMC Discuss Multi-Die Monitoring\, Embedded Test & Repair Flows
DESCRIPTION:Date: Feb 04\, 2026 | 9:00 AM PST \n\n\nFeatured Speakers: \n\nDr. Yervant Zorian \, Chief Architect and Fellow at Synopsys\, President of Synopsys Armenia\nDr. Sandeep K Goel\, Senior Director\, TSMC\n\nOur upcoming Synopsys webinar features an exciting real-world case study showcasing Synopsys IP and EDA tools with UCIe-based chiplets on advanced TSMC silicon and packaging technologies. See firsthand the silicon proof points for complete die-to-die interconnects\, embedded memory\, and logic monitoring\, test\, and repair. \nDiscover how 2.5D and 3D multi-die designs transform high-performance computing and AI. This webinar explores key challenges of monitoring\, embedded test and repair for multi-die designs\, including essential pre-stack and post-stack manufacturing flows\, in-field health monitoring\, and the role of the 3Dblox language (under IEEE P3537 Standardization) in enabling EDA tool interoperability. Learn about practical Silicon Lifecycle Management solutions that optimize quality\, yield\, reliability and manufacturing cost across advanced packaging configurations. \nWhat You Will Learn: \n\nSilicon proof points for monitoring\, test\, and repair across advanced packaging configurations\nKey embedded test & repair flows for multi-die designs\nIn-silicon health monitoring solutions for silicon lifecycle management\nPractical test cost minimization strategies for multi-die solutions\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\nFeatured Speakers\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\nDr. Yervant Zorian \nChief Architect\, Synopsys \nDr. Yervant Zorian is a chief architect and fellow at Synopsys\, as well as president of Synopsys Armenia. Yervant holds 35 U.S. patents\, has authored four books\, published over 350 refereed papers\, and received numerous best paper awards. He received an M.S. degree in Computer Engineering from the University of Southern California\, a PhD in Electrical Engineering from McGill University\, and an MBA from the Wharton School of Business\, University of Pennsylvania. \n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\nDr. Sandeep K Goel \nSenior Director\, TSMC \nDr. Sandeep K Goel is an academician and senior director at Taiwan Semiconductor Manufacturing Company (TSMC)\, USA. He previously held research and management roles at LSI\, Magma Design Automation\, and Philips Research. Dr. Goel earned his M.Tech. in VLSI from IIT Delhi in 1999 and his Ph.D. in Electrical and Computer Engineering from the University of Twente in 2005. He has co-authored multiple book chapters\, published over 90 conference/journal papers\, and holds more than 100 US patents. He received the Most Significant Paper Award at ITC in 2010 and the Distinguished Contributor Award from the IEEE Computer Society in 2022. He is the chair of IEEE Std. P3537 standard for 3Dblox: Chiplet connectivity and physical properties description language. His research focuses on design verification\, testing\, diagnosis\, and defect modeling of 2D/3D SOCs. \n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\nREGISTER HERE
URL:https://semiwiki.com/event/webinar-synopsys-and-tsmc-discuss-multi-die-monitoring-embedded-test-repair-flows/
LOCATION:Virtual
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DTSTART;TZID=America/Los_Angeles:20260205T090000
DTEND;TZID=America/Los_Angeles:20260205T100000
DTSTAMP:20260427T000959
CREATED:20260120T225257Z
LAST-MODIFIED:20260120T225257Z
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SUMMARY:Webinar: Building Efficient\, Secure\, and Scalable AI Systems with UALink
DESCRIPTION:Date: Feb 05\, 2026 | 9:00 AM PST \n\n\nFeatured Speakers: \n\nVarun Agrawal\, Product Manager\, Synopsys\nJon Ames\, Product Manager\, Synopsys\n\nDiscover how UALink enables open\, scalable\, secure interconnects for AI workloads—and how Synopsys IP and VIP accelerate adoption. \nWhy You Should Attend: \n\nLearn about UALink advantages over proprietary interconnects for AI scalability and security.\nExplore open ecosystem benefits: multi-vendor interoperability and hyperscale efficiency.\nSee Synopsys solutions in action: IP\, VIP\, and transactors for streamlined design and verification.\nGain strategic insights for future-proofing AI infrastructure with open standards.\n\n\n\n\n\nFeatured Speakers\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\nVarun Agrawal \nProduct Manager\, Synopsys \nVarun Agrawal is a product manager for verification IP\, virtual system adaptors\, and protocol solutions for hardware-assisted platforms at Synopsys. He has over 14 years of experience in functional verification with expertise in simulation\, emulation\, and virtualization domains. He holds a BTech in electronics and communications from NIT Hamirpur\, India\, and an MBA in marketing from India Institute of Foreign Trade (IIFT)\, New Delhi\, India \n\nJon Ames \nProduct Manager\, Synopsys \nJon Ames is a principal product manager for the Synopsys Ethernet IP portfolio. Jon has been working in the communications industry since 1988 and has led engineering and market activities from the early days of 10/100 Switched Ethernet through Metro and Transport variants to the latest Data Center and High-Performance Computing Ethernet technologies. Since graduating in Computer Science and Electronic Engineering the in UK\, Jon has worked at the leading companies in the networking and silicon solution industries. \n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\nREGISTER HERE
URL:https://semiwiki.com/event/webinar-building-efficient-secure-and-scalable-ai-systems-with-ualink/
LOCATION:Online
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DTSTART;VALUE=DATE:20260217
DTEND;VALUE=DATE:20260220
DTSTAMP:20260427T000959
CREATED:20250828T045454Z
LAST-MODIFIED:20250828T045454Z
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SUMMARY:Chiplet Summit 2026
DESCRIPTION:All the Solutions for Developing Chiplets\n2025 Keynote Addresses from Industry Leaders: \nAlphawave Semi\, Arm\, Cadence Design Systems\, Keysight\, Open Compute Project\, Synopsys\, Teradyne \n2025’s Main Topics Included: \nAI/ML Acceleration\, Open Chiplet Economy\, Advanced Packaging Methods\, Die-to-die Interfaces\, Working with Foundries \nsignup to be a 2026 SPONSOR / Exhibitor \nREGISTER HERE
URL:https://semiwiki.com/event/chiplet-summit-2026/
LOCATION:Santa Clara Convention Center\, Santa Clara Convention Center\, 5001 Great America Pkwy\, Santa Clara\, CA\, United States
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