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SUMMARY:Webinar: Shift-Left Compute Subsystem RTL Sign-Off with Software Aware VIP
DESCRIPTION:Wednesday\, March 11 – 8:00 AM Pacific \nDesign and verification teams consistently tell us that compute subsystems require software bring up much earlier than ever before. They need UEFI and Linux to run in simulation\, they need protocol accuracy from day one\, and they need a predictable path to signoff while integration risks rise every quarter. This struggle has become a shared industry reality. \nIn this session we present a scalable methodology to accelerate the development and verification of Compute Subsystems such as Arm® Neoverse™ V3 Compute Subsystem (CSS)-based designs\, with a shift-left in simulation and signoff using Avery Protocol VIP\, CSS VIP\, Software Aware VIP\, Arm Fast Models and QEMU models. \nThis methodology helps teams reduce integration risks\, shorten turnaround time\, and gain system level confidence long before moving to emulation or prototypes. If you are a design or verification engineer\, a firmware engineer or if you manage a team building next generation compute platforms\, this is an event that will strengthen your technical path forward. \nWhat You Will Learn:  \n\nSoftware Aware Verification IP and applications.\nBlock level / Subsystem Compliance Testing with Software Aware VIP.\nFull CSS HW/FW/SW bring up and UEFI Bootup.\nAdvanced debug of Hardware/Firmware/Software.\n\nWho Should Attend: \n\nVerification Managers and Directors.\nDesign and Verification Engineers.\nFirmware/Software Engineers.\n\nProducts Covered: \n\nAvery Verification IP.\nSoftware Aware VIP.\nSystem VIP (CSS).\n\nSpeakers:\n\n\n\n\n\nLuis E. Rodriguez \nTechnical Product Manager\, Siemens EDA \n\n\n\nLuis E. Rodriguez is a Technical Product Manager at Siemens EDA. \nLuis has 17+ years of experience in SoC and IP functional verification\, specializing in developing market‑leading Verification IP. \nHe has contributed to protocol workgroups including PCIe\, CCIX\, Gen‑Z\, and CXL\, where he helped define CXL 2.0 compliance testing. \nAt Siemens\, he focuses on partnerships and solutions for Software‑Aware VIP and supports cross‑functional integration of Verification IP with Siemens EDA tools and emerging Agentic AI. \nHe holds his master’s degree in computer science from National Taiwan University. \n\n\n\n\n\n\nAmit Tanwar \nSoftware Architect\, Siemens EDA \n\n\n\nAmit Tanwar is a Software Architect at Siemens EDA. \nAmit has 18 years of experience in PCI Express and UVM/SystemVerilog‑based Verification IP development. \nHe specializes in building high‑performance\, scalable\, and software‑aware VIP solutions\, and has contributed to multiple generations of advanced verification architectures across the semiconductor industry. \n\n\n\nREGISTER HERE
URL:https://semiwiki.com/event/webinar-shift-left-compute-subsystem-rtl-sign-off-with-software-aware-vip/
LOCATION:Online
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DTSTART;VALUE=DATE:20260331
DTEND;VALUE=DATE:20260401
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SUMMARY:Future.Industry 2026
DESCRIPTION:Forward Together\n\n\n\n\n\n\n\n\n\n\n\nAs your trusted Altair technology joins Siemens\, the world’s #1 industrial software company\, we’re poised to help you create faster\, build smarter\, and scale beyond what we ever imagined\, together. \n\n\n\n\n\n\n\n\n\n\nTuesday Mar 31\, 2026  I  3 time zones  I  8 languages \n\n\n\n\n\nThe power of possibility \n\n\n\n\n\n\n\n\n\n\nFor forty years\, Altair customers have explored the science of possibility. Leveraging the convergence of rocket science and data science\, propelled by high-performance computing\, together we have made the impossible\, possible. \nAltair’s capabilities in simulation\, high-performance computing\, data science and artificial intelligence together with Siemens Xcelerator is set to create the world’s most complete AI-powered design and simulation portfolio. \nJoin us for the Future.Industry virtual event with a global audience from over 25 countries\, to learn about the next chapter in design and simulation. \n\n\n\n\n\n\n\n\n\n\nREGISTER HERE
URL:https://semiwiki.com/event/future-industry-2026/
LOCATION:Virtual
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