BEGIN:VCALENDAR
VERSION:2.0
PRODID:-//SemiWiki - ECPv6.15.18//NONSGML v1.0//EN
CALSCALE:GREGORIAN
METHOD:PUBLISH
X-ORIGINAL-URL:https://semiwiki.com
X-WR-CALDESC:Events for SemiWiki
REFRESH-INTERVAL;VALUE=DURATION:PT1H
X-Robots-Tag:noindex
X-PUBLISHED-TTL:PT1H
BEGIN:VTIMEZONE
TZID:America/Los_Angeles
BEGIN:DAYLIGHT
TZOFFSETFROM:-0800
TZOFFSETTO:-0700
TZNAME:PDT
DTSTART:20250309T100000
END:DAYLIGHT
BEGIN:STANDARD
TZOFFSETFROM:-0700
TZOFFSETTO:-0800
TZNAME:PST
DTSTART:20251102T090000
END:STANDARD
BEGIN:DAYLIGHT
TZOFFSETFROM:-0800
TZOFFSETTO:-0700
TZNAME:PDT
DTSTART:20260308T100000
END:DAYLIGHT
BEGIN:STANDARD
TZOFFSETFROM:-0700
TZOFFSETTO:-0800
TZNAME:PST
DTSTART:20261101T090000
END:STANDARD
BEGIN:DAYLIGHT
TZOFFSETFROM:-0800
TZOFFSETTO:-0700
TZNAME:PDT
DTSTART:20270314T100000
END:DAYLIGHT
BEGIN:STANDARD
TZOFFSETFROM:-0700
TZOFFSETTO:-0800
TZNAME:PST
DTSTART:20271107T090000
END:STANDARD
END:VTIMEZONE
BEGIN:VEVENT
DTSTART;VALUE=DATE:20260302
DTEND;VALUE=DATE:20260306
DTSTAMP:20260423T011455
CREATED:20250624T160157Z
LAST-MODIFIED:20250624T160157Z
UID:357520-1772409600-1772755199@semiwiki.com
SUMMARY:Semitracks Course: Failure and Yield Analysis
DESCRIPTION:Failure and Yield Analysis is an increasingly difficult and complex process. Today\, engineers are required to locate defects on complex integrated circuits. In many ways\, this is akin to locating a needle in a haystack\, where the needles get smaller and the haystack gets bigger every year. Engineers are required to understand a variety of disciplines in order to effectively perform failure analysis. This requires knowledge of subjects like: design\, testing\, technology\, processing\, materials science\, chemistry\, and even optics! Failed devices and low yields can lead to customer returns and idle manufacturing lines that can cost a company millions of dollars a day. Your industry needs competent analysts to help solve these problems. Failure and Yield Analysis is a 4-day course that offers detailed instruction on a variety of effective tools\, as well as the overall process flow for locating and characterizing the defect responsible for the failure. This course is designed for every manager\, engineer\, and technician working in the semiconductor field\, using semiconductor components or supplying tools to the industry. \nBy focusing on a Do It Right the First Time approach to the analysis\, participants will learn the appropriate methodology to successfully locate defects\, characterize them\, and determine the root cause of failure. \n\n\nWhat Will I Learn By Taking This Class?\nParticipants will learn to develop the skills to determine what tools and techniques should be applied\, and when they should be applied. This skill-building series is divided into three segments: \n\nThe Process of Failure and Yield Analysis. Participants will learn to recognize correct philosophical principles that lead to a successful analysis. This includes concepts like destructive vs. non-destructive techniques\, fast techniques vs. brute force techniques\, and correct verification.\nThe Tools and Techniques. Participants will learn the strengths and weaknesses of a variety of tools used for analysis\, including electrical testing techniques\, package analysis tools\, light emission\, electron beam tools\, optical beam tools\, decapping and sample preparation\, and surface science tools.\nCase Histories. Participants will identify how to use their knowledge through the case histories. They will learn to identify key pieces of information that allow them to determine the possible cause of failure and how to proceed.\n\n\n\n\n\nCourse Objectives\n\nThis course will provide participants with an in-depth understanding of the tools\, techniques and processes used in failure and yield analysis.\nParticipants will be able to determine how to proceed with a submitted request for analysis\, ensuring that the analysis is done with the greatest probability of success.\nThis course will identify the advantages and disadvantages of a wide variety of tools and techniques that are used for failure and yield analysis.\nThis course will offer a wide variety of video demonstrations of analysis techniques\, so the analyst can get an understanding of the types of results they might expect to see with their equipment.\nParticipants will be able to identify basic technology features on semiconductor devices.\nParticipants will be able to identify a variety of different failure mechanisms and how they manifest themselves.\nParticipants will be able to identify appropriate tools to purchase when starting or expanding a laboratory.\n\n\n\nREGISTER HERE
URL:https://semiwiki.com/event/semitracks-course-failure-and-yield-analysis-2/
LOCATION:Munich\, Germany\, Munich\, Germany
ATTACH;FMTTYPE=image/png:https://semiwiki.com/wp-content/uploads/2025/06/Screenshot-2025-06-24-085557.png
ORGANIZER;CN="Semitracks%2C Inc.":MAILTO:info@semitracks.com
END:VEVENT
BEGIN:VEVENT
DTSTART;VALUE=DATE:20260309
DTEND;VALUE=DATE:20260313
DTSTAMP:20260423T011455
CREATED:20250624T161151Z
LAST-MODIFIED:20250624T161151Z
UID:357528-1773014400-1773359999@semiwiki.com
SUMMARY:Semitracks Course: Semiconductor Reliability and Product Qualification
DESCRIPTION:Product reliability and qualification continues to evolve with the electronics industry. New electronics applications require new approaches to reliability and qualification. In the past\, reliability meant discovering\, characterizing and modeling failure mechanisms\, and determining their impact on the reliability of the circuit. Today\, reliability can involve tradeoffs between performance and reliability; assessing the impact of new materials; dealing with limited margins\, and other factors. This requires information on subjects like: statistics\, testing\, technology\, processing\, materials science\, chemistry\, and customer expectations. While customers expect high reliability levels\, incorrect testing\, calculations\, and qualification procedures can severely impact reliability. Semiconductor Reliability and Product Qualification is a 4-day course that offers detailed instruction on a variety of subjects pertaining to semiconductor reliability and qualification. This course is designed for every manager\, engineer\, and technician concerned with reliability in the semiconductor field\, qualifying semiconductor components\, or supplying tools to the industry. \n\n\nWhat Will I Learn By Taking This Class?\nParticipants will learn to develop the skills to determine what failure mechanisms might occur\, and how to test for them\, develop models for them\, and eliminate them from the product. This skill building series is divided into four segments: \n\nOverview of Reliability and Statistics. Participants will learn the fundamentals of statistics\, sample sizes\, distributions and their parameters.\nFailure Mechanisms. Participants will learn the nature and manifestation of a variety of failure mechanisms that can occur both at the die and at the package level. These include: time-dependent dielectric breakdown\, hot carrier degradation\, electromigration\, stress-induced voiding\, moisture\, corrosion\, contamination\, thermomechanical effects\, interfacial fatigue\, and others.\nQualification Principles. Participants will learn how test structures can be designed to help test for a particular failure mechanism.\nTest Strategies. Participants will learn about the JEDEC test standards\, how to design screening tests\, and how to perform burn-in testing effectively.\n\n\n\n\n\nCourse Objectives\n\nThis course will provide participants with an in-depth understanding of the failure mechanisms\, test structures\, equipment\, and testing methods used to achieve today’s high reliability components.\nParticipants will be able to gather data\, determine how best to plot the data and make inferences from that data.\nThis course will identify the major failure mechanisms\, explain how they are observed\, how they are modeled\, and how they are eliminated.\nThis course will offer a variety of video demonstrations of analysis techniques\, so the participants can get an understanding of the types of results they might expect to see with their equipment.\nParticipants will be able to identify the steps and create a basic qualification process for semiconductor devices.\nParticipants will be able to knowledgeably implement screens that are appropriate to assure the reliability of a component.\nParticipants will be able to identify appropriate tools to purchase when starting or expanding a laboratory.\n\n\n\nREGISTER HERE
URL:https://semiwiki.com/event/semitracks-course-semiconductor-reliability-and-product-qualification/
LOCATION:Munich\, Germany\, Munich\, Germany
ATTACH;FMTTYPE=image/png:https://semiwiki.com/wp-content/uploads/2025/06/Screenshot-2025-06-24-085557.png
ORGANIZER;CN="Semitracks%2C Inc.":MAILTO:info@semitracks.com
END:VEVENT
BEGIN:VEVENT
DTSTART;VALUE=DATE:20260316
DTEND;VALUE=DATE:20260318
DTSTAMP:20260423T011455
CREATED:20250624T161345Z
LAST-MODIFIED:20250624T161345Z
UID:357530-1773619200-1773791999@semiwiki.com
SUMMARY:Semitracks Course: EOS\, ESD and How to Differentiate
DESCRIPTION:Electrical Overstress (EOS) and Electrostatic Discharge (ESD) account for most of the field failures observed in the electronics industry. Although EOS and ESD damage can at times look quite similar to each other\, the source each and the solution can be quite different. Therefore\, it is important to be able to distinguish between the two mechanisms. The semiconductor industry needs knowledgeable engineers and scientists to understand these issues. EOS\, ESD and How to Differentiate is a 2-day course that offers detailed instruction on EOS\, ESD and how to distinguish between them. This course is designed for every manager\, engineer\, and technician concerned with EOS\, ESD\, analyzing field returns\, determining impact\, and developing mitigation techniques. \n\n\nWhat Will I Learn By Taking This Class?\nParticipants will learn to develop the skills to determine what constitutes good EOS and ESD design\, how to recognize devices that can reduce EOS and ESD susceptibility\, and how to design new EOS and ESD structures for a variety of technologies. This skill-building series is divided into five segments: \n\nOverview of the EOS Failure Mechanism. Participants will learn the fundamentals of EOS\, the physics behind overstress conditions\, sources of EOS\, test equipment\, and the results of failure.\nOverview of the ESD Failure Mechanism. Participants will learn the fundamentals of ESD\, the physics behind static generation and discharge\, test equipment\, test protocols\, and the results of failure.\nESD Circuit Design Issues. Participants will learn how designers develop circuits to protect against ESD damage. This includes MOSFETs\, diodes\, off-chip driver circuits\, receiver circuits\, and power clamps.\nHow to Differentiate. Participants will learn how to tell the difference between EOS and ESD. They will learn how to simulate damage and interpret pulse widths\, amplitudes and polarity.\nResolving EOS and ESD on the Manufacturing Floor. Participants will see a number of common problems and their origins.\n\n\n\n\n\nCourse Objectives\n\nThis course will provide participants with an in-depth understanding of electrical overstress\, the models used for EOS\, and the manifestation of the mechanism.\nParticipants will be able to understand the ESD failure mechanism\, test structures\, equipment\, and testing methods used to achieve robust ESD resistance in today’s components.\nThis course will identify the major issues associated with ESD\, explain how they occur\, how they are modeled\, and how they are mitigated.\nParticipants will be able to identify basic ESD structures and how they are used to help reduce ESD susceptibility on semiconductor devices.\nParticipants will be able to distinguish between EOS and ESD when performing a failure analysis.\nParticipants will be able to estimate a pulse width\, pulse amplitude\, and determine the polarity of an EOS or ESD event.\nParticipants will see examples of common problems that result in EOS and ESD in the manufacturing environment.\n\n\n\nREGISTER HERE
URL:https://semiwiki.com/event/semitracks-course-eos-esd-and-how-to-differentiate/
LOCATION:Munich\, Germany\, Munich\, Germany
ATTACH;FMTTYPE=image/png:https://semiwiki.com/wp-content/uploads/2025/06/Screenshot-2025-06-24-085557.png
ORGANIZER;CN="Semitracks%2C Inc.":MAILTO:info@semitracks.com
END:VEVENT
END:VCALENDAR