Webinar: Application-Specific Processors (ASIPs) for Physical AI
2026-04-29 07:00 - 08:00 (America/Los_Angeles) | Online
Physical AI is increasingly popular in applications requiring real-time decision making and autonomous operation. Different from NPUs for cloud platforms, Physical AI processors can be made application-specific. By jointly tuning their ISA and memory architecture to the network models required by the application, power consumption and silicon area are drastically reduced.
Synopsys ASIP Designer is the industry-leading tool to explore, design, and optimize application-specific instruction-set processors (ASIPs), including custom NPUs for physical AI.
In this Synopsys webinar, we present the design of “SmarT”, an ASIP with a RISC-V ISA augmented with specialized vector units for convolutions and quantization, with 64 MACs. It supports circular gather/scatter addressing of vector data in parallel with computations. Low-overhead DMA moves data blocks from external to local memory.
Next, we present a multi-core RISC-V based accelerator for hyperdimensional computing, designed with ASIP Designer by TU Munich. It applies near-memory computing (NMC) to minimize power consumption and memory bandwidth. This 5-core chip is the first university-led tape-out in Germany using TSMC 7nm technology.
Learn about:

Synopsys ASIP Designer, the industry-leading tool to explore, design and optimize application specific processors
ASIP Design methodologies to address challenges in jointly optimizing the memory architecture and the computational resources for Physical AI architectures
Two ASIP designs examples with customize memory architectures for Physical AI applications

Featured Speaker

Dr. Falco Munsche
Technical Product Marketing, Synopsys
Falco Munsche is the Technical Product Manager for ASIP design tools at Synopsys. Previously he worked for a total of 20 years as Application Engineer and Software Engineer of ASIP design tools for Synopsys and CoWare, and as a Design Consultant for Synopsys.

Prof. Hussam Amrouch
Technical University of Munich, Germany
Hussam Amrouch is Professor heading the Chair of AI Processor Design within the Technical University of Munich (TUM). He is the head of Brain-inspired Computing at the Munich Institute of Robotics. Further, he is the head of the Semiconductor Test and Reliability at the University of Stuttgart. He is the Academic Director of TUM Venture Labs. He is Founding Director of the Munich Advanced-Technology Center for AI Chips (MACHT-AI).

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