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DTSTART;VALUE=DATE:20260219
DTEND;VALUE=DATE:20260221
DTSTAMP:20260502T084514
CREATED:20250624T160935Z
LAST-MODIFIED:20250624T160935Z
UID:357526-1771459200-1771631999@semiwiki.com
SUMMARY:Semitracks Course: Defect-Based Testing
DESCRIPTION:Semiconductor and integrated circuit developments continue to proceed at an incredible pace. For example\, today’s application-specific ICs and microprocessors can contain upwards of 100 million transistors. Traditional testing relies on the stuck-at-fault (SAF) to model defect behavior. Unfortunately\, the SAF model is a poor model for defects. Other models and strategies are required to catch killer defects on integrated circuits. As transistor sizes decrease\, the types and properties of the killer defects change. This has created a number of challenges related to the testing of components. Defect-Based Testing is a 2-day course that offers detailed instruction on the electrical behavior and test strategies for integrated circuits. We place special emphasis on electrical behavior\, fault models\, and test techniques. This course is a must for every manager\, engineer\, and technician working in IC test\, IC design\, or supplying test hardware and software tools to the industry. \nBy focusing on the fundamentals of circuit behavior and the impact of defects on circuit behavior\, participants will learn how to design\, write\, and implement test strategies to catch defects. Our instructors work hard to explain semiconductor test without delving heavily into the complex algorithms and computer science that normally accompany this discipline. \n\n\nWhat Will I Learn By Taking This Class?\nParticipants will learn basic\, but powerful\, aspects about defect-based testing. This skill-building series is divided into four segments: \n\nElectrical Behavior of Defects. Participants will study the electrical behavior of defects. They will learn how open circuits\, resistive vias\, shorts\, and transistor variations affect the electrical behavior of the individual transistor\, as well as gate elements and larger blocks.\nFault Models for Defect-Based Testing. Participants will learn about the historical underpinnings of the stuck-at-fault (SAF) model. They will also learn about other testing models\, including IDDQ testing\, at-speed testing\, and delay testing.\nProduction Test Methods. Participants will learn about standard digital testing\, SAF testing\, IDDQ\, timing\, low voltage tests\, and other types of stress tests. They will explore the strengths and weaknesses of each test type.\nThe Economic and Quality Impact of Defect-Based Testing. Participants will learn how defect-based testing can actually improve test economics. They will also study the impact on quality and reliability.\n\n\n\n\n\nCourse Objectives\n\nThis course will provide participants with an in-depth understanding of defect-based testing and its technical issues.\nParticipants will understand the basic concepts of test economics\, yield\, test time\, and the cost of test. They will also learn how defect-based testing can reduce the possibility of failures in the field.\nThis course will identify underused test techniques like IDDQ and Very Low Voltage (VLV) test techniques that can successfully find defects that are difficult to catch using conventional test techniques.\nThis course will offer the opportunity to discuss specific test problems with our expert instructors.\nParticipants will be able to identify basic and advanced principles for defect-based test.\nParticipants will understand the difficulties in extending IDDQ testing to leading edge products\, and how to overcome some of these limitations.\nParticipants will become familiar with Design for Test (DFT) and Automatic Test Pattern Generation (ATPG) tools used for defect-based testing.\nThis course will introduce fundamental and advanced concepts related to extending defect-based testing to future designs.\nParticipants will learn what tools are available today to implement defect-based testing.\n\n\n\nREGISTER HERE
URL:https://semiwiki.com/event/semitracks-course-defect-based-testing/
LOCATION:Munich\, Germany\, Munich\, Germany
ATTACH;FMTTYPE=image/png:https://semiwiki.com/wp-content/uploads/2025/06/Screenshot-2025-06-24-085557.png
ORGANIZER;CN="Semitracks%2C Inc.":MAILTO:info@semitracks.com
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BEGIN:VEVENT
DTSTART;VALUE=DATE:20260223
DTEND;VALUE=DATE:20260227
DTSTAMP:20260502T084514
CREATED:20250624T160729Z
LAST-MODIFIED:20250624T160729Z
UID:357524-1771804800-1772150399@semiwiki.com
SUMMARY:Semitracks Course: Wafer Fab Processing
DESCRIPTION:Semiconductor and integrated circuit developments continue to proceed at an incredible pace. The industry as a whole has gotten to this point of incredible complexity through the process of countless breakthroughs and developments in wafer fab processing. Today’s wafer fab contains some of the most complex and intricate procedures ever developed by mankind. Wafer Fab Processing is a 4-day course that offers an in-depth look into the semiconductor manufacturing process\, and the individual processing technologies required to make them. We place special emphasis on the basics surrounding each technique\, and we delve into the current issues related to manufacturing the next generation devices. This course is a must for every manager\, engineer and technician working in the semiconductor industry\, using semiconductor components or supplying tools to the industry. \nBy focusing on the basics of each processing step and the issues surrounding them\, participants will learn why certain techniques are preferred over others. Our instructors work hard to explain how semiconductor processing works without delving heavily into the complex physics and mathematical expressions that normally accompany this discipline. \n\n\nWhat Will I Learn By Taking This Class?\nParticipants will learn basic\, but powerful\, aspects about the semiconductor industry. This skill-building series is divided into three segments: \n\nBasic Semiconductor Wafer Processing Steps. Each processing step addresses a specific need in IC creation. Participants will learn the fundamentals of each processing step and why they are used in the industry today.\nThe Evolution of Each Processing Step. It is important to understand how wafer fab processing came to the point where it is today. Participants will learn how each technique has evolved for use in previous and current generation ICs.\nCurrent Issues in Wafer Fab Processing. Participants will learn how many processing steps are increasingly constrained by physics and materials science. They will also learn about the impact of using new materials in the fabrication process\, and how those materials may create problems for the manufacturers in the future.\n\nThis course is a must for every manager\, engineer\, and technician working in the semiconductor industry\, using semiconductor components\, or supplying tools to the industry. Our instructors work hard to explain how semiconductor wafer processing works without delving heavily into the complex physics and mathematical expressions that normally accompany this discipline. \n\n\n\n\nCourse Objectives\n\nThis course will provide participants with an in-depth understanding of the semiconductor industry and its technical issues.\nParticipants will understand the basic concepts behind the fundamental wafer fab processing steps.\nThis course will identify the key issues related to each of the processing techniques\, and their impact on the continued scaling of the semiconductor industry.\nThis course will offer a wide variety of sample problems that participants will work to help them gain knowledge of the fundamentals of wafer fab processing.\nParticipants will be able to identify the basic features and principles associated with each major processing step. These include processes like chemical vapor deposition\, ion implantation\, lithography\, and etching.\nParticipants will understand how processing\, reliability\, power consumption and device performance are interrelated.\nParticipants will be able to make decisions about how to construct and evaluate processing steps for CMOS\, BiCMOS\, and bipolar technologies.\n\n\n\nREGISTER HERE
URL:https://semiwiki.com/event/semitracks-course-wafer-fab-processing-2/
LOCATION:Munich\, Germany\, Munich\, Germany
ATTACH;FMTTYPE=image/png:https://semiwiki.com/wp-content/uploads/2025/06/Screenshot-2025-06-24-085557.png
ORGANIZER;CN="Semitracks%2C Inc.":MAILTO:info@semitracks.com
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