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IEEE International Conference on PHYSICAL ASSURANCE and INSPECTION of ELECTRONICS (PAINE)
2025-10-14 - 2025-10-16 | Denver, CO, Denver, CO, United States
ABOUT PAINE
Physical inspection of electronics has grown significantly over the past decade and is becoming a major focus for the chip designers, original equipment manufacturers, and system developers. The complex long life of the electronic devices coupled with their diverse applications is making them increasingly vulnerable to various forms of threats and inspection. Large industry and government efforts have been put in place across the globe to address related supply chain security problems to offer solutions, training, and services. The number of programs introduced by the US government has increased over the years to analyze and develop relevant solutions. Although much focus is given to the digital domain, physical assurance and inspection of electronics as well as physical fingerprinting based on analog parameters are rapidly providing opportunities for unique countermeasures.
PAINE conference provides a unique venue for all researchers and practitioners from academia, industry, and government to have productive dialog on such topics. Accepted papers will be submitted for inclusion into IEEE Xplore subject to meeting IEEE Xplore’s scope and quality requirements. PAINE covers the broad topic of hardware security and trust; example topics of interest include but are not limited to:
Topics to be Covered:

New metrologies for characterization and assurance
Advanced packaging and heterogenous integration
Emerging topics in physical inspection and assurance
Image analysis and artificial intelligence for assurance and inspection
Metrologies characterization
Automated inspection and metrology for advanced packaging
Security primitives: Novel devices, materials, and systems
Test vehicles and performance quantification
Additive manufacturing assurance for electronics
Physical and design interface assurance
Trojans and backdoors: Detection and prevention

Workforce Development
Fault injection assessment and countermeasures
Side channel assessment (power, timing, EM) for assurance and countermeasures
Analog & mixed-signal circuits and systems security
FPGA Bitstream protection and vulnerabilities
Counterfeit Detection and Anti-Counterfeit Technique
Novel material and devices for assurance
Sample Preparation
PCB trust and assurance
Chip and PCB level decomposition for assurance
FIB/SEM for assurance

Electro-optical probing using PEM, EOP, EOFM, etc.
Physical/side channel fingerprinting
Mod-chip on PCB
Microprobing and nanoprobing
Bus-snooping
Field-based weakness
Countermeasures against tampering and decomposition
Functionality validation
Process improvements
Failure analysis and fault isolation
Physical/logical shielding etc.
Photonics Assurance

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