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SUMMARY:Terascale AI\, 1.6T and Beyond Seminar: Santa Clara
DESCRIPTION:About this event\nNext-generation AI systems are pushing electrical\, optical\, and packaging technologies to their limits. Join Keysight experts as they share insights on validating 224G / 448G SerDes\, preparing for emerging IEEE 1.6T optical standards\, advancing silicon photonics\, and strengthening die-to-die interconnects for chiplet-based architectures. \nThis is your chance to learn directly from the engineers shaping the future of high-speed I / O design — all in one room. Sign up today. \n\n\n\n\n\n\n\nWho should attend this event?\nThis seminar is ideal for engineers working on next-generation connectivity and AI infrastructure\, including optical design\, silicon photonics\, high-speed digital\, validation\, test & measurement\, signal integrity\, compliance\, and chiplet / die-to-die interconnect architectures. \n\n\n\n\n\n\nREGISTER HERE
URL:https://semiwiki.com/event/terascale-ai-1-6t-and-beyond-seminar-santa-clara/
LOCATION:Santa Clara\, CA\, Santa Clara\, CA\, United States
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SUMMARY:Webinar: Advances in ATPG: From Power and Timing Awareness to Intelligent Pattern Search with AI
DESCRIPTION:Date: Jan 14\, 2026 | 10:00 AM PST \n\n\nFeatured Speakers: \n\nSrikanth Venkat Raman\, Product Management Director\, Synopsys\nKhader Abdel-Hafez\, Scientist\, Synopsys\nTheo Toulas\, R&D Principal Engineer\, Synopsys\nBruce Xue\, Staff Engineer\, Synopsys\n\nAs System-on-Chip (SoC) designs become increasingly complex\, meeting test quality and cost goals requires advances in automatic test pattern generation (ATPG). Synopsys TestMAX™ ATPG is Synopsys’ state-of-the-art pattern generation solution. In this Synopsys webinar\, we will showcase the latest ATPG advancements\, from power- and timing-aware capabilities to leveraging AI for reducing test costs. Discover how you can meet the power constraints of your SoC tests with power-efficient ATPG patterns. Learn how timing-aware ATPG can enhance test quality. We will also explore Synopsys TSO.ai™ (Test Space Optimization AI)\, the industry’s first autonomous AI application for semiconductor testing\, designed to minimize test cost and time-to-market for today’s complex designs. \nWhy You Should Attend: \n\nDiscover best practices for limiting power consumption during shift and capture operations.\nSee practical demonstrations of how you manage test power at the top-level of your SoC through a top-level budget and partition-level budgets.\nLearn how advanced fault models (slack-based transition\, path delay\, and hold-time) can improve the quality of your tests from a timing standpoint.\nGain insights from Synopsys experts on how TestMAX™ ATPG leverages tighter connection with PrimeTime® to better handle timing exceptions (SDC) during test generation. See how ATPG can handle Muti-cycle paths (MCPs).\nLearn how TSO.ai automatically searches for an optimal solution in a large test search space to minimize pattern count and ATPG turn-around time reducing test costs dramatically.\n\n\nREGISTER HERE
URL:https://semiwiki.com/event/webinar-advances-in-atpg-from-power-and-timing-awareness-to-intelligent-pattern-search-with-ai/
LOCATION:Online
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