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BEGIN:VEVENT
DTSTART;TZID=America/Los_Angeles:20260609T090000
DTEND;TZID=America/Los_Angeles:20260609T170000
DTSTAMP:20260529T165520
CREATED:20260528T041425Z
LAST-MODIFIED:20260528T041425Z
UID:369653-1780995600-1781024400@semiwiki.com
SUMMARY:Verification Academy Live Hudson
DESCRIPTION:This seminar will provide design engineers and verification teams with the knowledge and tools needed to advance their workflows using the latest AI-driven automation\, intelligent verification platforms\, and industry-proven methodologies. \n\nThis event is in-person only — there is no support for remote participation. \nSpecifically\, we will cover: \n\nHow generative AI and agentic automation are transforming chip design\, RTL development\, and verification closure workflows.\nThe latest advancements in Verification IP (VIP) for accelerating interface-level verification and bridging hardware and embedded software validation.\nHow to protect against data corruption and strengthen hardware security posture using formal security verification techniques.\nHow AI/ML-driven Verification IQ (VIQ) delivers predictive insights\, coverage guidance\, and regression optimization for smarter\, faster verification closure.\n\n\nREGISTER HERE
URL:https://semiwiki.com/event/verification-academy-live-hudson/
LOCATION:American Heritage Museum\, American Heritage Museum\, 568 Main St\, Hudson\, MA\, 01749\, United States
ATTACH;FMTTYPE=image/png:https://semiwiki.com/wp-content/uploads/2026/05/1f80ba964748e66ce052b732e40d1aa6e8d8503a-737x570-1.png
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=America/Los_Angeles:20260609T090000
DTEND;TZID=America/Los_Angeles:20260609T170000
DTSTAMP:20260529T165520
CREATED:20260528T211650Z
LAST-MODIFIED:20260528T211650Z
UID:369715-1780995600-1781024400@semiwiki.com
SUMMARY:MedTech Advancement Seminar - Minneapolis
DESCRIPTION:About this event\nConnected medical and wearable devices face growing demands for wireless reliability\, regulatory compliance\, and extended battery life in increasingly crowded RF environments. This engineer-focused seminar delivers practical guidance on regulatory trends\, EMC and wireless testing\, coexistence strategies\, and FDA-driven requirements for connected devices. \nThrough expert-led sessions and insights from David Schaefer of Element Materials Technology\, attendees will gain a real-world perspective they can apply directly to development\, validation\, and compliance workflows. This helps teams reduce risk\, improve performance\, and prepare for the next generation of connected healthcare devices. \n\n\n\n\n\n\n\nWho should attend this event?\nThis event is ideal for design\, RF\, and compliance teams. \nREGISTER HERE
URL:https://semiwiki.com/event/medtech-advancement-seminar-minneapolis/
LOCATION:Minneapolis\, MN\, Minneapolis\, MN\, United States
ATTACH;FMTTYPE=image/png:https://semiwiki.com/wp-content/uploads/2026/05/Screenshot-2026-05-28-141625.png
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BEGIN:VEVENT
DTSTART;VALUE=DATE:20260610
DTEND;VALUE=DATE:20260612
DTSTAMP:20260529T165520
CREATED:20260107T105553Z
LAST-MODIFIED:20260107T105553Z
UID:365397-1781049600-1781222399@semiwiki.com
SUMMARY:Hardware Pioneer Max
DESCRIPTION:Join the UK’s largest expo dedicated to cutting-edge hardware technology for innovation-driven engineers\n\n\n\n\nAt Hardware Pioneers Max you have the unique opportunity to meet with leading experts and suppliers that can help you learn faster\, make better decisions and speed up your product development process. \n\n\n\nREGISTER HERE
URL:https://semiwiki.com/event/hardware-pioneer-max/
LOCATION:ExCeL London\, Royal Victoria Dock\, 1 Western Gateway\, London\, E16 1XL\, United Kingdom
ATTACH;FMTTYPE=image/png:https://semiwiki.com/wp-content/uploads/2026/01/Screenshot-2026-01-07-025525.png
END:VEVENT
BEGIN:VEVENT
DTSTART;VALUE=DATE:20260610
DTEND;VALUE=DATE:20260612
DTSTAMP:20260529T165520
CREATED:20260326T224703Z
LAST-MODIFIED:20260326T224703Z
UID:367952-1781049600-1781222399@semiwiki.com
SUMMARY:2026 European Executive Forum
DESCRIPTION:June 10 8:00 AM – June 11 5:00 PM CEST\n2026 European Executive Forum\n\nMunich\, Germany\n\nREGISTER HERE
URL:https://semiwiki.com/event/2026-european-executive-forum/
LOCATION:Munich\, Germany
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=America/Los_Angeles:20260610T090000
DTEND;TZID=America/Los_Angeles:20260610T160000
DTSTAMP:20260529T165520
CREATED:20260528T041118Z
LAST-MODIFIED:20260528T041118Z
UID:369649-1781082000-1781107200@semiwiki.com
SUMMARY:Experience the Power of Integrated Design Innovation - Live event in Santa Clara
DESCRIPTION:Join us for an immersive\, hands-on exploration of Siemens’ industry-leading Custom IC Design tool flow. Whether you’re a prospect evaluating solutions or an existing user looking to maximize your investment\, this full-day workshop delivers practical experience with tools that accelerate design cycles and enhance collaboration across your teams. \nSignup for either or both sessions based on your role in the design community. Our business unit experts will be present throughout the day to answer your questions and provide insight into our future technology. \nWho should attend?\n\nDesign Engineers seeking to optimize their workflow\nDesign Managers evaluating comprehensive IC design solutions\nProspects exploring Siemens Custom IC Design capabilities\nCurrent Users advancing their tool proficiency\n\nKey benefits\n\nHands-On Experience – Direct interaction with production-grade tools\nExpert Guidance – Learn best practices from Siemens specialists\nIntegrated Workflow – See how front-end and physical design connect seamlessly\nCompetitive Advantage – Discover how to reduce design cycles and improve quality\n\nWhat to bring / Technical requirements\nThis is a bring-your-own-laptop workshop. To ensure a smooth\, hands-on experience\, please come prepared with the following: \n\nWi‑Fi–enabled laptop: You will connect to the Siemens Guest Network on the day of the event.\nLaptop screen size: 14” or larger\nMinimum resolution: 1920 × 1440 or higher recommended\nOperating system: Windows® 10 or Windows® 11\nWeb browser: Google Chrome preferred. Also supported: Firefox and Microsoft Edge (used to access the event’s Virtual Machine)\nMouse: A 3‑button mouse is recommended\, if available. We will have loaner mice available on the day\n\nREGISTER HERE
URL:https://semiwiki.com/event/experience-the-power-of-integrated-design-innovation-live-event-in-santa-clara/
LOCATION:Siemens Digital Industries Software\, Siemens Digital Industries Software\, 5455 Great America Pkwy\, Suite 401\, Santa Clara\, CA\, 95054\, United States
ATTACH;FMTTYPE=image/png:https://semiwiki.com/wp-content/uploads/2026/05/Screenshot-2026-05-27-211031.png
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=America/Los_Angeles:20260610T100000
DTEND;TZID=America/Los_Angeles:20260610T170000
DTSTAMP:20260529T165520
CREATED:20260528T212032Z
LAST-MODIFIED:20260528T212044Z
UID:369724-1781085600-1781110800@semiwiki.com
SUMMARY:Keysight Automotive & Energy Tech Day 2026
DESCRIPTION:About this event\nAs vehicles become software-defined and electrification accelerates\, validation now spans battery systems\, power electronics\, EV charging\, connectivity\, software\, and grid interaction. \nKeysight Automotive & Energy Tech Day 2026 showcases the breadth of solutions supporting validation across the automotive and energy ecosystem — from battery cell to cloud\, charger to grid\, and sensor to software. \nJoin us to explore live demos\, technical sessions\, and expert insights covering SDV validation\, physical\, protocol and timing layers for in-vehicle networks\, grid disturbance testing\, AI validation\, and unified workflows from R&D through production. \nRegistration required — reserve your spot today. \n\n\n\n\n\n\nWho should attend this event?\nThis event is ideal for engineers\, test managers\, and technical leaders across automotive\, EV charging\, energy\, and grid modernization. \n\n\n\nREGISTER  HERE
URL:https://semiwiki.com/event/automotive-energy-tech-day-2026/
LOCATION:Novi\, MI\, Novi\, MI\, Novi\, MI\, United States
ATTACH;FMTTYPE=image/png:https://semiwiki.com/wp-content/uploads/2026/05/Screenshot-2026-05-28-142003.png
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=America/Los_Angeles:20260610T173000
DTEND;TZID=America/Los_Angeles:20260610T203000
DTSTAMP:20260529T165520
CREATED:20260425T080632Z
LAST-MODIFIED:20260425T080632Z
UID:368784-1781112600-1781123400@semiwiki.com
SUMMARY:ESD Alliance 2026 Executive Outlook
DESCRIPTION:“How Will Agentic AI Change Chip Design and Verification?” features EDA and emerging agentic AI company executives and entrepreneurs discussing changes within chip design and verification as agentic AI tools become more mainstream. Panelists will distill the excitement surrounding the innovation in chip design and verification\, collaboration between traditional EDA and agentic AI startups and broader implications for technological advancements. \nREGISTER HERE
URL:https://semiwiki.com/event/esd-alliance-2026-executive-outlook/
LOCATION:Cadence Design Systems\, Cadence Design Systems\, 2655 Seely Avenue\, San Jose\, CA\, 95134\, United States
ATTACH;FMTTYPE=image/jpeg:https://semiwiki.com/wp-content/uploads/2026/04/ESDA-Exec-Outlook-2026-Tile.jpg
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=America/Los_Angeles:20260611T083000
DTEND;TZID=America/Los_Angeles:20260611T170000
DTSTAMP:20260529T165520
CREATED:20260528T212315Z
LAST-MODIFIED:20260528T212315Z
UID:369729-1781166600-1781197200@semiwiki.com
SUMMARY:Manufacturing Test Midwest User Group
DESCRIPTION:About this event\nManufacturing test is evolving fast — and teams need smarter\, more connected approaches to keep pace. \nJoin the Manufacturing Test Midwest User Group to explore how modern tools and workflows are transforming how production test is designed\, validated\, and scaled. From inline automation and fixture embedded electronics to next-generation ICT\, boundary scan\, and functional test\, see how these solutions are applied in real-world environments. \nGet early insight into emerging test technologies\, learn practical techniques to improve coverage and efficiency\, and experience hands-on demos with the tools you use every day. \n\n\n\n\n\n\nWho should attend this event?\nThis event is ideal for test engineers\, managers\, and executives looking to improve efficiency and stay ahead of evolving manufacturing demands. Expand your expertise\, connect with peers\, and gain insight into what’s next in electronic manufacturing test. \n\n\n\nREGISTER HERE
URL:https://semiwiki.com/event/manufacturing-test-midwest-user-group/
LOCATION:Novi\, MI\, Novi\, MI\, Novi\, MI\, United States
ATTACH;FMTTYPE=image/png:https://semiwiki.com/wp-content/uploads/2026/05/Screenshot-2026-05-28-142230.png
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=America/Los_Angeles:20260611T100000
DTEND;TZID=America/Los_Angeles:20260611T110000
DTSTAMP:20260529T165520
CREATED:20260528T212431Z
LAST-MODIFIED:20260528T212431Z
UID:369732-1781172000-1781175600@semiwiki.com
SUMMARY:Webinar: How Frequency Ranges Expanded\, and Why Measurement Fidelity Became Critical
DESCRIPTION:About this event\nEngineering at the Edge Webinar Series – Episode 2 \nAs systems move into higher frequencies and wider bandwidths\, small measurement errors can lead to costly design decisions. Engineers working in wireless\, radar\, satellite\, and optical domains must now validate signals that push existing tools to their limits. \nJoin Jun Chie\, Vice President of Product Management at Keysight\, to explore where measurement fidelity begins to break down\, and how engineers are adapting. You’ll see how next-generation instrumentation helps improve signal accuracy\, reduce uncertainty\, and increase confidence in design decisions. \n\n\n\n\n\n\nWho should attend this event?\nRF\, microwave\, and wireless engineers in aerospace\, satellite\, and communications should attend. This session fits teams who need precise\, high-frequency measurement and improved signal accuracy. \n\n\n\nREGISTER HERE
URL:https://semiwiki.com/event/webinar-how-frequency-ranges-expanded-and-why-measurement-fidelity-became-critical-2/
LOCATION:Online
ATTACH;FMTTYPE=image/png:https://semiwiki.com/wp-content/uploads/2026/05/Screenshot-2026-05-28-142402.png
END:VEVENT
BEGIN:VEVENT
DTSTART;VALUE=DATE:20260614
DTEND;VALUE=DATE:20260619
DTSTAMP:20260529T165520
CREATED:20250828T061019Z
LAST-MODIFIED:20250828T061019Z
UID:361103-1781395200-1781827199@semiwiki.com
SUMMARY:2026 IEEE/JSAP Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)
DESCRIPTION:New concepts and breakthroughs in VLSI processes and devices including Memory\, Logic\, I/O\, and I/F (RF/Analog/MS\, Imager\, MEMS\, etc.) – Advanced gate stack and interconnect in VLSI processes and devices – Advanced lithography and fine patternig technologies for high density VLSI – New functional devices beyond CMOS with a path for VLSI implantation – Packing of VLSI devices including 3D – system integration – Processes and devices modeling of VLSI devices – Reliability related to the above devices. \nHonolulu\, Hawaii\, USA  |  Event Format : Hybrid (In-person and Virtual) \nREGISTER HERE
URL:https://semiwiki.com/event/2026-ieee-jsap-symposium-on-vlsi-technology-and-circuits-vlsi-technology-and-circuits/
LOCATION:Honolulu\, Hawaii\, Honolulu\, HI\, United States
ATTACH;FMTTYPE=image/png:https://semiwiki.com/wp-content/uploads/2025/08/Screenshot-2025-08-27-230953.png
END:VEVENT
BEGIN:VEVENT
DTSTART;VALUE=DATE:20260616
DTEND;VALUE=DATE:20260618
DTSTAMP:20260529T165520
CREATED:20250828T061412Z
LAST-MODIFIED:20250828T061412Z
UID:361106-1781568000-1781740799@semiwiki.com
SUMMARY:Automobil-Elektronik Kongress 2026
DESCRIPTION:We are excited to announce the 30th Automobil-Elektronik Kongress\, set to take place on June 16 and 17\, 2026 at the Forum am Schlosspark in Ludwigsburg\, Germany. This prestigious technical conference will bring together industry experts\, researchers\, and innovators to discuss the latest advancements in automotive electronics. Join us to stay at the forefront of innovation in the automotive electronics industry and network with leading professionals in the field. \nREGISTER HERE
URL:https://semiwiki.com/event/automobil-elektronik-kongress-2026/
LOCATION:Forum am Schlosspark\, Stuttgarter Str. 33\, Ludwigsburg\, 71638\, Germany
ATTACH;FMTTYPE=image/png:https://semiwiki.com/wp-content/uploads/2025/08/Screenshot-2025-08-27-231304.png
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=America/Los_Angeles:20260616T100000
DTEND;TZID=America/Los_Angeles:20260616T110000
DTSTAMP:20260529T165520
CREATED:20260425T081130Z
LAST-MODIFIED:20260425T081130Z
UID:368789-1781604000-1781607600@semiwiki.com
SUMMARY:Webinar: How Agentic AI Keeps Documentation Consistent and Accurate
DESCRIPTION:**Work Email Required for Registration** \nEmbedded systems programs rarely fail because any one team lacks capability. They fail because critical engineering artifacts drift out of alignment over time and distance. \nThis includes requirements\, architecture\, implementation\, verification\, hardware bring-up\, firmware\, and customer documentation. Local correctness does not guarantee lifecycle coherence. llmda.ai believes that consistency itself should become a managed engineering layer. \nIn this webinar\, you will learn about a new platform being developed by llmda.ai that delivers that all-important lifecycle coherence. We will introduce llmda Spectra™\, a product that compiles accurate technical documentation directly from engineering artifacts using structured templates and hardware-grounded AI. \nRather than replacing the systems you are already using\, llmda sits above them and helps keep them synchronized over time\, geography\, and within/between disparate teams. The result is a superior design in less time with far less rework. \nDuring the webinar you’ll learn more about llmda Spectra and see live demonstrations of it in action. \nWHO SHOULD ATTEND THIS WEBINAR? \nIf you are engaged in embedded system design at the chip\, hardware integration or firmware/software levels you will benefit from the information presented in this \nYou will learn how to automatically generate all internal & external product documentation. By automating this manual task\, Architects\, lead engineers and the entire team get back 20-30% of their time to devote to critical Engineering activities. Next\, the automation keeps the documentation consistent with the artifacts. \n* This webinar is in partnership with SemiWiki and llmda.ai \nREGISTER HERE
URL:https://semiwiki.com/event/webinar-how-agentic-ai-keeps-documentation-consistent-and-accurate/
LOCATION:Online
ATTACH;FMTTYPE=image/png:https://semiwiki.com/wp-content/uploads/2026/04/Screenshot-2026-04-25-011051.png
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=America/Los_Angeles:20260616T100000
DTEND;TZID=America/Los_Angeles:20260616T110000
DTSTAMP:20260529T165520
CREATED:20260528T212601Z
LAST-MODIFIED:20260528T212601Z
UID:369735-1781604000-1781607600@semiwiki.com
SUMMARY:Webinar: What Your Inference Stack is Trying to Tell You
DESCRIPTION:About this event\nThe Inference Stack Can Talk. Learn How to Listen. \nAI has entered the inference era. \nFor years the industry focused on training models. But today the real challenge is running AI workloads in production at scale. \nIn this webinar\, you’ll have the opportunity to learn how to decode the signals from your inference stack and turn them into smarter infrastructure decisions. \nWhat We’ll Discuss \n\nWhy inference is a full-stack system\, not just a GPU event.\nThe signals your inference stack is already generating.\nHow to translate those signals into data-backed infrastructure decisions.\nHow real AI workloads impact performance\, memory\, and scaling.\n\n\n\n\n\n\n\nWho should attend this event?\nNetwork engineers\, network architects\, and professionals who optimize networks for AI should attend. This webinar serves anyone responsible for improving network performance for AI workloads. \n\n\n\nREGISTER HERE
URL:https://semiwiki.com/event/webinar-what-your-inference-stack-is-trying-to-tell-you/
LOCATION:Online
ATTACH;FMTTYPE=image/png:https://semiwiki.com/wp-content/uploads/2026/05/Screenshot-2026-05-28-142537.png
END:VEVENT
BEGIN:VEVENT
DTSTART;VALUE=DATE:20260617
DTEND;VALUE=DATE:20260620
DTSTAMP:20260529T165520
CREATED:20260107T105806Z
LAST-MODIFIED:20260107T105806Z
UID:365400-1781654400-1781913599@semiwiki.com
SUMMARY:3D & Systems Summit 2026
DESCRIPTION:Themed Heterogeneous Integration: Bolstering Europe’s Resilience the 3D & Systems Summit 2025 will primarily focus on exploring strategies for enhancing Europe’s semiconductor industry addressing topics as geopolitical dynamics\, market trends\, as well as the latest advancements in chiplet applications and hybrid bonding techniques. The Summit will feature an exclusive exhibition area\, showcasing industry leaders alongside innovative emerging companies. This Summit is a platform for gathering and exchange of knowledge and fostering of collaborations within the semiconductor sector. \nAttendees will have several opportunities for B2B matching\, including networking receptions\, coffee breaks\, lunches\, and a unique Networking Dinner Cruise along the beautiful Elbe River. \nREGISTER HERE
URL:https://semiwiki.com/event/3d-systems-summit-2026/
LOCATION:Hilton Dresden Hotel\, Hilton Dresden Hotel\, An der Frauenkirche 5 D\, Dresden\, 01067\, Germany
ATTACH;FMTTYPE=image/png:https://semiwiki.com/wp-content/uploads/2026/01/Screenshot-2026-01-07-025739.png
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=America/Los_Angeles:20260617T100000
DTEND;TZID=America/Los_Angeles:20260617T110000
DTSTAMP:20260529T165520
CREATED:20260528T212700Z
LAST-MODIFIED:20260528T212720Z
UID:369738-1781690400-1781694000@semiwiki.com
SUMMARY:Webinar: Americas Session | SOS for Visual Studio Code: Design Data Management for Digital Design Teams
DESCRIPTION:About this event\nThis webinar showcases how the Keysight Technologies SOS extension integrates design data management directly into Visual Studio Code\, helping digital design and verification teams streamline RTL and HDL workflows without leaving their coding environment. \n\n\n\n\n\n\nWho should attend this event?\nDigital design engineers writing RTL in SystemVerilog\, Verilog\, or VHDL who use VS Code as their primary editor\, Verification engineers building UVM environments\, constrained-random testbenches\, or formal property sets\, SoC integration and IP development teams managing shared blocks and hierarchical references across multiple projects\, CAD\, methodology\, and design infrastructure leads responsible for revision discipline\, reproducibility\, and audit traceability\, Engineering managers evaluating consolidation of design data management across digital\, analog\, and mixed-signal flows\, Current SOS users on the SOS command line or other clients who want a modern editor-native experience\, Teams currently relying on Git\, Perforce\, or ad hoc snapshot scripts for HDL projects who are evaluating purpose-built EDA design data management. \n\n\n\nREGISTER HERE
URL:https://semiwiki.com/event/webinar-americas-session-sos-for-visual-studio-code-design-data-management-for-digital-design-teams/
LOCATION:Online
ATTACH;FMTTYPE=image/png:https://semiwiki.com/wp-content/uploads/2026/05/Screenshot-2026-05-28-142704.png
END:VEVENT
BEGIN:VEVENT
DTSTART;VALUE=DATE:20260622
DTEND;VALUE=DATE:20260627
DTSTAMP:20260529T165520
CREATED:20251211T213919Z
LAST-MODIFIED:20251211T213919Z
UID:364634-1782086400-1782518399@semiwiki.com
SUMMARY:ISC 2026
DESCRIPTION:CONFERENCE & EXHIBITION\n\n\n\n\n\n\n\n\nHPC\, AI\, Quantum: Powering Innovation and Sustainability \n\n\n\n\nISC 2026 connects scientists\, engineers\, and technology leaders to explore the future of high performance computing. We will examine today’s breakthroughs in artificial intelligence\, high performance computing and quantum technologies\, as well as what lies ahead. \nAdditionally\, we are committed to sustainability by promoting energy-efficient and cost-effective computing\, while empowering the next-generation workforce to continue the community’s legacy of innovation. \nISC 2026 will bring together a mix of people from different backgrounds and areas of expertise to drive HPC. Whether you are just entering the field\, in a mid-level position\, a part of senior management\, or a student\, we welcome you to join our efforts to connect people and technologies. \n\n\n\n\nREGISTER HERE
URL:https://semiwiki.com/event/isc-2026/
LOCATION:Hamburg\, Germany\, Hamburg\, Germany
ATTACH;FMTTYPE=image/png:https://semiwiki.com/wp-content/uploads/2025/12/Screenshot-2025-12-11-133841.png
END:VEVENT
BEGIN:VEVENT
DTSTART;VALUE=DATE:20260623
DTEND;VALUE=DATE:20260624
DTSTAMP:20260529T165520
CREATED:20260114T021718Z
LAST-MODIFIED:20260129T235644Z
UID:365702-1782172800-1782259199@semiwiki.com
SUMMARY:Verification Futures Conference 2026 UK
DESCRIPTION:Verification Futures UK 2026\, co-located with Semiconductors Futures 2026 organised by Tessolve and co-organised this year with Alpinum. The conference continues its strong tradition of delivering a unique blend of conference presentations\, exhibitions\, training\, and industry networking sessions focused on the challenges faced in hardware and software verification. The event remains an important forum for end-users to define their verification challenges and collaborate with engineers\, researchers\, and vendors to shape practical solutions. In 2026\, Verification Futures continues to strengthen its core emphasis on verification methodologies\, DV tools\, and engineering workflows\, including areas such as formal methods for complex SoCs\, CPU & RISC-V verification\, open-source and licence-free verification tools\, AI in design verification (AI in DV)\, verification planning and coverage\, and HW/SW co-verification. \nSemiconductors Futures 2026 brings together the semiconductor community\, covering AI/ML in IP & SoC design\, AI’s impact on EDA and workflows\, FPGA & mixed-signal\, with a focus on the automotive\, data centre\, and AI products. New tracks consider emerging technologies such as quantum computing\, photonics\, and chiplets\, as well as startups and investments. We expect 50+ engineering students to attend a separate session. \nCALL FOR PAPERS \nREGISTER HERE
URL:https://semiwiki.com/event/verification-futures-conference-2026-uk/
LOCATION:Hybrid: In-Person and Virtual Conference\, Reading\, United Kingdom
ATTACH;FMTTYPE=image/jpeg:https://semiwiki.com/wp-content/uploads/2026/01/unnamed-2.jpg
END:VEVENT
BEGIN:VEVENT
DTSTART;VALUE=DATE:20260623
DTEND;VALUE=DATE:20260626
DTSTAMP:20260529T165520
CREATED:20260414T063431Z
LAST-MODIFIED:20260414T063431Z
UID:368412-1782172800-1782431999@semiwiki.com
SUMMARY:LID World Summit 2026
DESCRIPTION:CEA-Leti’s flagship event\n\n\n\n\nDiscover sustainable semiconductor breakthroughs to guide your roadmap from lab-to-market and to tomorrow’s AI factory at LID World Summit 2026. \nJoin industry leaders to discover groundbreaking innovation that will help meet technological goals for the healthcare\, automotive\, industrial\, defense\, and consumer-electronics sectors. Leave with confidence in the possible. \n\n\nREGISTER HERE
URL:https://semiwiki.com/event/lid-world-summit-2026/
LOCATION:Grenoble\, France
ATTACH;FMTTYPE=image/png:https://semiwiki.com/wp-content/uploads/2026/04/Screenshot-2026-04-13-233332.png
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=America/Los_Angeles:20260624T010000
DTEND;TZID=America/Los_Angeles:20260624T020000
DTSTAMP:20260529T165520
CREATED:20260528T212844Z
LAST-MODIFIED:20260528T212844Z
UID:369741-1782262800-1782266400@semiwiki.com
SUMMARY:Webinar: Americas Session | End-to-End Co-Design for Ethernet: Bridging Photonics and Electronics with EOE Simulation
DESCRIPTION:About this event\nThis webinar shows how engineers can use a unified EOE simulation workflow in Keysight Advanced Design System (ADS) to co-design and validate high-speed Ethernet systems across both electronic and photonic domains for faster\, more accurate development. \n\n\n\n\n\n\nWho should attend this event?\nSignal integrity engineers working on high-speed Ethernet links\, Photonic design engineers developing optical transceivers and PICs\, System architects in data center and AI infrastructure\, Hardware design engineers involved in co-packaged optics (CPO) and pluggable modules\, R&D teams focused on next-generation interconnect technologies. \n\n\n\nREGISTER HERE
URL:https://semiwiki.com/event/webinar-americas-session-end-to-end-co-design-for-ethernet-bridging-photonics-and-electronics-with-eoe-simulation/
LOCATION:Online
ATTACH;FMTTYPE=image/png:https://semiwiki.com/wp-content/uploads/2026/05/Screenshot-2026-05-28-142811.png
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=America/Los_Angeles:20260624T090000
DTEND;TZID=America/Los_Angeles:20260624T120000
DTSTAMP:20260529T165520
CREATED:20260518T213746Z
LAST-MODIFIED:20260518T213746Z
UID:369367-1782291600-1782302400@semiwiki.com
SUMMARY:Synopsys Virtual Prototyping Day
DESCRIPTION:Join us for our 6th Annual Virtual Prototyping Day and learn how you can “shift left” your development cycle with virtual prototypes. \nHighly complex SoC and muti-die designs are putting pressure on silicon and software development teams to meet time-to-market demands. Virtual prototypes are the answer to begin development earlier\, reduce costs\, collaborate across teams\, and get your design to market faster. \nThis popular series features customers and partners who will present how they solve their design challenges using virtual prototypes. \nThis is an on-line event where you can attend from the convenience of your office\, home\, or anywhere you happen to be! \nWe have 2 specialized tracks designed to cater to the diverse interests and needs of our community: \nTrack 1 – System Architecture Design & Exploration \nOptimize the efficiency and performance of complex systems by enabling early architecture design exploration and optimization. This approach helps in identifying potential issues and opportunities for improvement\, ultimately leading to reduced development costs and faster time-to-market. \nTrack 2 – Software Development & Test \nEnhance software development and testing with a virtual environment\, where developers can simulate and validate system behavior without the need for physical hardware. This accelerates the development process\, improves early detection of issues\, and reduces costs associated with hardware dependencies and testing infrastructure. \nREGISTER HERE
URL:https://semiwiki.com/event/synopsys-virtual-prototyping-day/
LOCATION:Online
ATTACH;FMTTYPE=image/png:https://semiwiki.com/wp-content/uploads/2026/05/Screenshot-2026-05-18-143657.png
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=America/Los_Angeles:20260625T090000
DTEND;TZID=America/Los_Angeles:20260625T163000
DTSTAMP:20260529T165520
CREATED:20260429T075058Z
LAST-MODIFIED:20260429T075058Z
UID:368934-1782378000-1782405000@semiwiki.com
SUMMARY:TSMC 2026 China Technology Symposium
DESCRIPTION:Join us to get the latest on:\n\nTSMC’s industry-leading HPC\, Smartphones\, IoT\, and Automotive platform solutions\nTSMC’s advanced logic technology progress on 3nm\, 2nm\, A16\, A14 processes and beyond\nTSMC 3DFabric® advanced silicon stacking and packaging technology advancement on TSMC-SoIC®\, InFO\, CoWoS®\, and TSMC-SoW™\nTSMC’s specialty technology breakthroughs on ultra-low power\, RF\, embedded memory\, power management\, sensor technologies\, and more\nTSMC’s manufacturing excellence\, capacity expansion plans\, and green manufacturing achievements\nTSMC’s Open Innovation Platform® Ecosystem to speed up time-to-design\n\nFor more information on the TSMC Technology Symposium\, e-mail us at: symposium@tsmc.com. \nWe look forward to seeing you at the TSMC 2026 Technology Symposium! \nREGISTER HERE
URL:https://semiwiki.com/event/tsmc-2026-china-technology-symposium/
LOCATION:Shanghai International Convention Center (SHICC)\, No.2727\, Riverside Avenue\, Pudong\, Shanghai\, 200120\, China
ATTACH;FMTTYPE=image/png:https://semiwiki.com/wp-content/uploads/2026/04/Screenshot-2026-04-29-005004.png
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=America/Los_Angeles:20260625T100000
DTEND;TZID=America/Los_Angeles:20260625T110000
DTSTAMP:20260529T165520
CREATED:20260528T213005Z
LAST-MODIFIED:20260528T213005Z
UID:369744-1782381600-1782385200@semiwiki.com
SUMMARY:Webinar: How Manufacturing Complexity Increased\, and Why Validation Had to Evolve
DESCRIPTION:About this event\nEngineering at the Edge Webinar Series – Episode 4 \nAs semiconductor complexity increases and board designs become denser\, manufacturing teams face tighter tolerances\, reduced test access\, and rising pressure to maintain yield and throughput. Validating RF performance and high-speed digital signal integrity at production scale adds a new layer of complexity that traditional approaches struggle to address. \nJoin Jason Kary\, Senior Vice President and President of Keysight’s ElectronicIndustrial Solutions Group\, to explore how manufacturing validation is evolving. You’ll learn how wafer-level and in-circuit test strategies improve coverage\, detect defects earlier\, and enable consistent\, high-volume production at scale without compromising quality. \n\n\n\n\n\n\nWho should attend this event?\nSemiconductor and electronics manufacturing engineers should attend. This session fits teams focused on test coverage\, yield improvement\, and high-volume production validation. \n\n\n\nREGISTER HERE
URL:https://semiwiki.com/event/webinar-how-manufacturing-complexity-increased-and-why-validation-had-to-evolve-2/
LOCATION:Online
ATTACH;FMTTYPE=image/png:https://semiwiki.com/wp-content/uploads/2026/05/Screenshot-2026-05-28-142402.png
END:VEVENT
BEGIN:VEVENT
DTSTART;VALUE=DATE:20260627
DTEND;VALUE=DATE:20260628
DTSTAMP:20260529T165520
CREATED:20260414T062122Z
LAST-MODIFIED:20260414T062122Z
UID:368392-1782518400-1782604799@semiwiki.com
SUMMARY:Scaling DRAM Technology to Meet Future Demands: System Challenges and Opportunities
DESCRIPTION:Tutorial Abstract\nSince the invention of the 1T1C bit cell more than 50 years ago\, DRAMs have become the main memory of choice for processors in computing systems and consumer electronics devices. As new computing paradigms have been created\, including AI\, 3D graphics\, HPC\, cloud computing\, and smart phones\, specialized processors and DRAM memories have been developed that are optimized for these use cases. The same 1T1C DRAM bit cell is used in each of these applications\, but the internal architecture and interfaces of the DRAMs supporting these markets are optimized in different ways\, and the DRAMs are packaged differently (sometimes with additional buffer chips) to meet the needs of the system. \nAcross all markets\, there is a relentless demand for higher performance and better power efficiency\, as insufficient DRAM bandwidth can bottleneck application performance and interfaces to DRAMs can consume half of the SOC power. DRAMs are also being stressed by growing reliability concerns as they incorporate on-die ECC and mitigation for disturbance effects such as RowHammer and RowPress. As AI continues to grow across markets (HPC\, server\, client\, mobile\, etc.)\, the design of efficient\, performant and reliable memory systems is becoming increasingly critical. AI models are continuing to grow\, pushing the capacity and bandwidth requirements of DRAMs. Simply scaling with historical techniques will no longer achieve the required characteristics due to physical challenges\, limits of process scaling\, and system architecture constraints including thermals and power delivery. \nThis tutorial will describe DRAM architecture in detail\, highlighting the similarities and differences between different DRAM technologies and the unique tradeoffs and design choices made to meet system needs. We will also cover the key components that memory transactions travel thorough to get to DRAMs and back\, including memory controllers\, PHYs\, and where applicable\, modules and buffer chips. We will describe the architecture of these critical components and discuss how DRAM architecture choices impact their performance and power efficiency. Standard scaling techniques for DRAMs will be highlighted along with challenges that the industry is currently facing. Input from industry experts will show the pros and cons of DRAM architecture choices\, demonstrating the system impact and requirements for mainstream adoption. Future DRAM architectures will also be discussed. \nTopics that will be covered\nThe tutorial will focus on DRAM architecture\, specifically looking at design tradeoffs and subsequent impact to the overall system performance\, power\, cost and reliability. The tutorial will cover the following topics: \n\nBackground and History of DRAM markets. How they were historically defined\, what changed\, and the drivers of new technologies.\nDRAM array architecture\, internal data paths\, shared structures\, and interfaces.\nThe future of DRAM\, including 3D DRAM cells.\nMemory modules\, including DIMMs\, CAMMs\, MRDIMMs\, and CXL modules and their buffer chips.\nCapacity\, power\, reliability\, cost tradeoffs that motivate different DRAM architectures for different markets including computing\, mobile\, graphics\, and AI. This will include underlying core architecture\, packaging and system integration.\nPower and energy differences between DRAM technologies.\nNovel packaging techniques including stacking and 2.5D assembly.\nReliability\, Availability\, and Serviceability (RAS) techniques\, including on-die error correction\, system-level ECC\, redundancy and repair\, and RowHammer and RowPress mitigation.\nProcessing in memory that has been implemented in DRAM silicon.\nMemory controller architecture and design challenges with current and future DRAMs.\nPHY architectures and challenges with achieving higher data rates and power efficiencies.\nSystem performance considerations\, including latency under load and the impact of core timings and core architecture on performance.\nMemory system architecture considerations to achieve maximum performance\, highlighting the impact of DRAM core timing and architecture tradeoffs on the host controller design.\nIndustry adoption challenges facing new DRAM technologies and features.\nChallenges for the future.\n\nOrganizers and Affiliations\nSteven Woo is a Fellow and Distinguished Inventor at Rambus Inc.\, where he leads research in Rambus Labs on advanced memory systems for accelerators and computing infrastructure\, and manages a team of senior architects. Since joining Rambus\, Steve has worked in various roles leading architecture\, technology\, and performance analysis efforts\, and in marketing and product planning roles leading strategy and customer programs.  He has more than 30 years of experience working on advanced memory systems and holds more than 100 US and international patents. Steve received his PhD and MS degrees in Electrical Engineering from Stanford University\, and Master of Engineering and BS Engineering degrees from Harvey Mudd College. \nWendy Elsasser is a Technical Director of Research Science at Rambus Inc. She works in the Rambus Labs R&D division researching future system architecture and developing innovative solutions to address the challenges of the memory sub-system. She has over 25 years of experience in industry\, starting with semi-custom micro-controller design\, test\, and implementation. Over the last 20 years\, her focus has been on memory sub-systems\, primarily external DRAM. Her experience includes DRAM controller architecture\, design\, and validation as well as active contributions to consortiums and standards bodies. Specifically\, she was a leader in the Gen-Z consortium and JEDEC\, helping to define future memory interfaces and DRAM standards. Her work has resulted in 15 patents. \nRobert Palmer is a Senior Technical Director of Research Science at Rambus Inc.\, leading research in future memory module and memory buffer chip architectures. He has over 25 years of industry experience developing silicon IP and communication ICs\, spanning the design of high-speed wireline transceiver circuits\, serial link and memory controller PHY microarchitectures\, and DDR and CXL memory buffer chip architectures and microarchitectures. In addition to his tenure at Rambus\, Robert has held positions at Velio Communications and Nvidia Research. He holds over 60 US and international patents. \nTaeksang Song is a Corporate Vice President at Samsung Electronics where he is leading a team dedicated to pioneering cutting-edge technologies including CAMM\, MRDIMM\, CXL memory expanders\, fabric attached memory solutions and processing near memory to meet the evolving demands of next-generation data-centric AI architectures. He has 20 years of professional experience in memory and sub-system architecture\, interconnect protocols\, system-on-chip design and collaborating with CSPs to enable heterogeneous computing infrastructure. Prior to joining Samsung Electronics\, he worked at Rambus Inc.\, Micron Technology and SK hynix in lead architect roles for the emerging memory controllers and systems. Taeksang received his PhD from KAIST\, South Korea\, in 2006. He has authored and co-authored over 20 technical papers and holds over 50 U.S. patents. \nREGISTER HERE
URL:https://semiwiki.com/event/scaling-dram-technology-to-meet-future-demands-system-challenges-and-opportunities/
LOCATION:Raleigh\, North Carolina\, Raleigh\, NC\, United States
ATTACH;FMTTYPE=image/png:https://semiwiki.com/wp-content/uploads/2026/04/Screenshot-2026-04-13-232033.png
END:VEVENT
BEGIN:VEVENT
DTSTART;VALUE=DATE:20260627
DTEND;VALUE=DATE:20260702
DTSTAMP:20260529T165520
CREATED:20260414T062249Z
LAST-MODIFIED:20260414T062249Z
UID:368397-1782518400-1782950399@semiwiki.com
SUMMARY:ISCA 2026
DESCRIPTION:The International Symposium on Computer Architecture (ISCA) is the premier forum for new ideas and experimental results in computer architecture. The conference specifically seeks particularly forward-looking and novel submissions. In 2026\, the 53rd edition of ISCA will be held in Raleigh at the Raleigh Convention Center from June 27 to July 1\, 2026. \nREGISTER HERE
URL:https://semiwiki.com/event/isca-2026/
LOCATION:Raleigh Convention Center\, Raleigh Convention Center\, 500 Fayetteville St\, Raleigh\, NC\, 27601\, United States
ATTACH;FMTTYPE=image/png:https://semiwiki.com/wp-content/uploads/2026/04/Screenshot-2026-04-13-232202.png
END:VEVENT
BEGIN:VEVENT
DTSTART;VALUE=DATE:20260628
DTEND;VALUE=DATE:20260702
DTSTAMP:20260529T165520
CREATED:20260107T110056Z
LAST-MODIFIED:20260107T110056Z
UID:365403-1782604800-1782950399@semiwiki.com
SUMMARY:ALD/ALE 2026
DESCRIPTION:Overview\n\n\n\n\nThe AVS 26th International Conference on Atomic Layer Deposition (ALD 2026) featuring the 13th International Atomic Layer Etching Workshop (ALE 2026) will be a three-day meeting dedicated to the science and technology of atomic layer controlled deposition of thin films and atomic layer etching.  Since 2001\, the ALD conference has been held alternately in the United States\, Europe and Asia\, allowing fruitful exchange of ideas\, know-how and practices between scientists. The conference will take place Sunday\, June 28-Wednesday\, July 1\, 2026\, at the JW Marriott Water Street\, Tampa\, Florida. \nAs in past conferences\, the meeting will be preceded (Sunday\, June 28) by one day of tutorials and perspectives and a welcome reception. Sessions will take place (Monday-Wednesday\, June 29-July 1) along with an industry tradeshow. All presentations will be audio-recorded and provided to attendees following the conference (posters will be included as PDFs). Anticipated attendance is 700+. View List of Invited Speakers \n\n\nREGISTER HERE
URL:https://semiwiki.com/event/ald-ale-2026/
LOCATION:JW Marriott Water Street\, JW Marriott Water Street\, 510 Water St\, Tampa\, FL\, 33602\, United States
ATTACH;FMTTYPE=image/png:https://semiwiki.com/wp-content/uploads/2026/01/Screenshot-2026-01-07-025943.png
END:VEVENT
BEGIN:VEVENT
DTSTART;VALUE=DATE:20260629
DTEND;VALUE=DATE:20260702
DTSTAMP:20260529T165520
CREATED:20260211T220710Z
LAST-MODIFIED:20260211T220710Z
UID:366633-1782691200-1782950399@semiwiki.com
SUMMARY:Realize LIVE Europe 2026
DESCRIPTION:Join us in 2026\nWe are ready to deliver more \n1\,800+ attendees. Join our community of users\, industry experts and trusted partners. Realize LIVE offers something for everyone! \n350+ sessions. Explore breakout sessions\, technical tracks\, trainings and more. More than 60% of sessions were led by customers\, sharing real-world insights. \n90% overall satisfaction rate. Realize LIVE is your digital transformation destination! Join our community and walk away a better user. \n\n\n\n\nAccelerate your digital transformation journey\n\n\n\n\n\nLearned from experts and industry leaders\, built skills and discovered the latest trends and technology with more than 350+ sessions at Realize LIVE Europe. \n\n\n\n\n\n\nBecome a better user\nLeave empowered — 88% of attendees left Realize LIVE Europe 2025 with new skills and enhanced tool proficiency. \n\n\nGet inspired by thought leaders\nIn 2025 over 60% of sessions were led by customers\, sharing real-world insights and innovations. You can expect even more in 2026. \n\n\nStay ahead with product roadmaps\nAttendees will stay up-to-date with exclusive product presentations showcasing the latest advancements in Siemens technology\, and hear about functionality updates\, so you can plan for what comes next. \n\n\nGain exclusive hands-on training and certification\nAttendees receive complimentary hands-on training\, 60 days access to Siemens Xcelerator Academy and 20 lab hours. Plus\, the opportunity to earn your Siemens Xcelerator Certification (€1000 value). \n\n\nConnect and celebrate with product experts\nJoined dedicated portfolio meet-ups\, industry receptions and our Community Corner to connect with peers who are on their digital transformation journey. Don’t forget the evening events — a great chance to relax and network! \n\n\nDive into the Siemens ecosystem\nRealize LIVE Europe is your destination for all things digital transformation. Meet experts\, engage with partners and experience live demos in the Solutions Center. \n\n\n\nREGISTER HERE
URL:https://semiwiki.com/event/realize-live-europe-2026/
LOCATION:RAI Amsterdam Convention Centre\, Europaplein 24\, Amsterdam\, 1078 GZ\, Netherlands
ATTACH;FMTTYPE=image/png:https://semiwiki.com/wp-content/uploads/2026/02/Screenshot-2026-02-11-140637.png
END:VEVENT
BEGIN:VEVENT
DTSTART;VALUE=DATE:20260629
DTEND;VALUE=DATE:20260703
DTSTAMP:20260529T165520
CREATED:20260107T110301Z
LAST-MODIFIED:20260107T110301Z
UID:365409-1782691200-1783036799@semiwiki.com
SUMMARY:SMACD 2026
DESCRIPTION:Welcome to SMACD 2026\nInternational Conference on Synthesis\, Modeling\, Analysis and Simulation Methods\, and Applications to Circuit Design \nREGISTER HERE
URL:https://semiwiki.com/event/smacd-2026/
LOCATION:Dresden\, Germany\, Dresden\, Germany
ATTACH;FMTTYPE=image/jpeg:https://semiwiki.com/wp-content/uploads/2026/01/images-1.jpg
END:VEVENT
BEGIN:VEVENT
DTSTART;VALUE=DATE:20260630
DTEND;VALUE=DATE:20260701
DTSTAMP:20260529T165520
CREATED:20260414T060533Z
LAST-MODIFIED:20260414T060533Z
UID:368379-1782777600-1782863999@semiwiki.com
SUMMARY:CadenceCONNECT: Tech Days Europe 2026 - Leuven
DESCRIPTION:Join us at CadenceCONNECT: Tech Days Europe 2026\, our annual\, free\, multi-track event dedicated to the engineers\, innovators\, and visionaries shaping the future of electronic design. Our aim is to bring together like minded thinkers to explore how AI-driven Cadence technologies are transforming design workflows\, boosting productivity\, and enabling breakthroughs across every domain. \nREGISTER HERE
URL:https://semiwiki.com/event/cadenceconnect-tech-days-europe-2026-leuven/
LOCATION:Leuven\, Belgium\, Leuven\, Belgium
ATTACH;FMTTYPE=image/png:https://semiwiki.com/wp-content/uploads/2026/04/Screenshot-2026-04-13-225642.png
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=America/Los_Angeles:20260630T090000
DTEND;TZID=America/Los_Angeles:20260630T100000
DTSTAMP:20260529T165520
CREATED:20260528T213232Z
LAST-MODIFIED:20260528T213232Z
UID:369746-1782810000-1782813600@semiwiki.com
SUMMARY:Webinar: See it Before You Build it with VisionSym
DESCRIPTION:About this event\nJoin our upcoming webinar to discover how VisionSym transforms CAD models into photorealistic images using LightTools or LucidShape—eliminating the need for physical prototypes. \nWith GPU-accelerated ray tracing and photometrically accurate simulations\, VisionSym enables both design verification and visual appearance evaluation in one streamlined workflow. \nIn this session\, you’ll learn how to: \n\nValidate designs against automotive regulations and OEM specs\nUse photorealistic simulations to improve efficiency and accuracy\n\n\n\n\n\n\n\n\nWho should attend this event?\nEngineers and managers seeking faster\, more integrated design workflows. \n\n\n\nREGISTER HERE
URL:https://semiwiki.com/event/webinar-see-it-before-you-build-it-with-visionsym/
LOCATION:Online
ATTACH;FMTTYPE=image/png:https://semiwiki.com/wp-content/uploads/2026/05/Screenshot-2026-05-28-143151.png
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=America/Los_Angeles:20260630T090000
DTEND;TZID=America/Los_Angeles:20260630T100000
DTSTAMP:20260529T165520
CREATED:20260528T213352Z
LAST-MODIFIED:20260528T213352Z
UID:369749-1782810000-1782813600@semiwiki.com
SUMMARY:Webinar: ImSym – Imaging System Simulator Discovery Training
DESCRIPTION:About this event\nThis discovery training introduces ImSym – Imaging System Simulator\, an advanced platform for end-to-end imaging system simulation. \nImSym allows engineers to virtually prototype imaging systems by modeling the full image formation pipeline\, from scene and optics through the detector and image signal processing. This enables earlier insight into real-world image performance and supports more efficient design decisions. \nWhat You Will Learn: \n\nUnderstand what ImSym is and the imaging challenges it addresses\nIdentify key components of the imaging system pipeline\nGain a high-level view of the ImSym interface and workflow\nUnderstand the fundamentals of end-to-end image simulation\n\n\n\n\n\n\n\nWho should attend this event?\nThis training is ideal for: \n\nOptical and lens designers\nStray light engineers\nSystem engineers\nImaging and optical engineers\nEngineering managers evaluating imaging workflows\n\nNo prior ImSym experience required. A basic understanding of imaging systems or optics is recommended. \n\n\n\nREGISTER HERE
URL:https://semiwiki.com/event/webinar-imsym-imaging-system-simulator-discovery-training/
LOCATION:Online
ATTACH;FMTTYPE=image/png:https://semiwiki.com/wp-content/uploads/2026/05/Screenshot-2026-05-28-143338.png
END:VEVENT
END:VCALENDAR