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DATE 2026
2026-04-20 - 2026-04-22 | Palazzo della Gran Guardia, Palazzo della Gran Guardia, Piazza Brà, Verona, 37121, Italy
Design, Automation and Test in Europe Conference |
The European Event for Electronic System Design & Test
Call for Papers

The DATE conference is the main European event bringing together designers and design automation users, researchers and vendors, as well as specialists in hardware and software design, test, and manufacturing of electronic circuits and systems. DATE places a strong emphasis on both technology and systems, covering ICs/SoCs, reconfigurable hardware, and embedded systems, as well as embedded software.
The three-day event consists of a conference with regular papers, extended abstracts, and late breaking results, complemented by timely keynotes, special days, focus sessions, embedded tutorials, half-day workshops, and multi-partner project sessions. The event will also host the Young People Programme fostering networking and exchanges of information on relevant issues, recent research outcomes, and career opportunities for junior researchers. Poster-supported live interactions and pre-recorded videos are available to complement all research paper presentations before, during, and after the conference.
DATE 2026 is the 29th edition of an event that has always been the place for researchers, young professionals, and industrial partners to meet, present their research, and discuss current developments and upcoming trends, with high emphasis on social interaction.
Conference Scope
The conference addresses all aspects of research into technologies for electronic and systems engineering. It covers the design process, test, and tools for design automation of electronic products, ranging from integrated circuits to distributed large-scale systems. This domain includes both hardware and embedded software design issues. The conference scope also includes the specification of design requirements and new architectures for challenging application fields such as sustainable computing, smart societies and digital wellness, secure systems, autonomous systems and smart industry, and state-of-the-art applications of artificial intelligence. Engineers, scientists, and researchers involved in innovative industrial designs are particularly encouraged to submit papers to foster feedback ranging from design to research aspects.
Conference Sponsors
The event is sponsored by the European Design and Automation Association (EDAA), the Electronic System Design Alliance (ESDA), the IEEE Council on Electronic Design Automation (IEEE CEDA) and the ACM Special Interest Group on Design Automation (ACM SIGDA).
In cooperation with IEEE Computer Society Test Technology Technical Community (TTTC), IEEE Solid-State Circuits Society (SSCS) and IEEE Computer Society (IEEE CS).
Conference Committees
The conference leverages the support of multiple committees to support its organisation. The DATE Sponsors Committee supervises the overall structure and operations of the conference; the Executive Committee designs and implement the yearly programme of the conference, and the Technical Programme Committee is dedicated to develop reviews and select the research manuscripts to be published at the conference.

DATE Sponsors Committee (DSC)
DATE Executive Committee (DEC)
Technical Programme Committee (TPC)

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2026 IEEE Custom Integrated Circuits Conference (CICC)
2026-04-19 - 2026-04-23 | Seattle, Washington, Seattle, WA, United States
Join us for CICC 2026, the world’s premier conference devoted to IC development.

April 19 – 22, 2026 Seattle, WA, USA

April 22 – 23, 2026 – CHISIC Workshop
About CICC

The IEEE Custom Integrated Circuits Conference is a premier conference devoted to IC development. The conference program is a blend of oral presentations, exhibits, panels and forums. The conference sessions present original first published technical work and innovative circuit techniques that tackle practical problems. CICC is the conference to find out how to solve design problems, improve circuit design techniques, get exposure to new technology areas, and network with peers, authors and industry experts.
There are 3 days of Technical Sessions that include lecture presentations addressing state of the art developments in integrated circuit design. The Educational Sessions are a full day of tutorials instructed by recognized invited speakers. The Panels, and Forums are presented throughout the conference to enrich the learning experience of the attendees. The Panel Discussions and Forums are presented by leaders from the IC industry. CICC includes an Exhibits Hall that is open in the evenings where Semiconductor manufacturers, software tool suppliers, silicon IP providers, design-service houses, and technical book publishers offer displays and demonstrations of their products. CICC is sponsored by the IEEE Solid-State Circuits Society and technically co-sponsored by the IEEE Circuits and Systems Society.

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CadenceLIVE Silicon Valley 2026
2026-04-16 | Santa Clara Convention Center, Santa Clara Convention Center, 5001 Great America Pkwy, Santa Clara, CA, United States
Join us on April 16 for CadenceLIVE Silicon Valley 2026, where Cadence technology users connect with the engineers and industry leaders who develop the solutions and the industry experts who influence market trends.
Participants experience a day of learning, connection, and cutting-edge technology shaping the future of electronic design and intelligent systems. This premier event brings together the brightest minds for a day of inspiration and innovation.
REGISTER HERE

2026 CMC Conference
2026-04-14 - 2026-04-16 | DoubleTree by Hilton Hotel Portland, DoubleTree by Hilton Hotel Portland, 1000 NE Multnomah St, Portland, OR, 97232, United States
2026 CMC Conference
April 14-16, 2026
“Critical Materials at the Crossroads—
Driving the Roadmap for Semiconductor Materials”
DoubleTree by Hilton Hotel in Portland, Oregon
Featuring Keynote:
Ben Sell, Vice President and GM of Logic Technology Development at Intel Corporation
*The CMC Conference follows the Private CMC Meetings:
CMC Fabs-Only on Apr. 13-14 and CMC Joint Session (Fabs & Suppliers) on Apr. 14
The Critical Materials Council (CMC) Conference, brought to you by TECHCET, is a two-day event designed to deliver actionable insights into the materials and supply chains that enable today’s and tomorrow’s semiconductor manufacturing. The program focuses on the critical materials that drive innovation, strengthen industry resiliency, and support long-term sustainability across the global semiconductor ecosystem. Unlike other conferences, the CMC Conference provides practical information addressing “How-to” not just “What.” Solutions to process challenges and materials-related issues are a key focus for the CMC conference presenters. Equally important focal points include business and supply-chain trends and materials needed for emerging technologies.
Featuring 5 Impactful Sessions:
1. Global Issues & Trends Impacting Materials
2. Immediate Issues of Manufacturing and Materials
3. Heterogenous Integration & Advanced Packaging Materials
4. Challenges of Equipment & Component Materials
5. Emerging Materials in R&D and Pilot Fabrication
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SPIE Photonics Europe 2026
2026-04-12 - 2026-04-16 | Palais de la Musique et des Congrès, Palais de la Musique et des Congrès, Place de Bordeaux, Strasbourg, 67082, France
Hear the latest advances from leading experts. Join colleagues in Strasbourg.

Hear research presented at this specialized European event for optical instrumentation with the latest advances in optical systems applications, materials, and processing. We look forward to seeing everyone in April.
Registration is open. The programme will be available in January.
Conferences: 12–16 April 2026 | Exhibition: 15–16 April 2026
Again this year, SPIE Photonics Europe 2026 and SPIE Optical Systems Design are co-located.

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MSEC 2026
2026-03-31 - 2026-04-02 | Hyatt Regency Boston / Cambridge, Hyatt Regency Boston / Cambridge, 575 Memorial Dr, Cambridge, MA, 02139, United States
SENSORIZATION: ENABLING A NEW INTELLIGENCE
The MEMS and Sensors Executive Conference 2024 is designed for senior executives across the MEMS and sensors supply chain and adjacent industries. Industry economic, business updates will be covered from different aspects of the ecosystem, together with forward-looking strategic and technology trends. The opportunities and challenges brought about by key technologies in bio-medical/MEMS healthcare, generative AI, positioning navigation and timing and sustainability will be explored. The growth in existing and emerging MEMS and sensors markets, together with the resulting new components, software, and systems needs, will also be discussed. The usual networking and deal making opportunities will be a key feature as usual.
Get a deep dive on—

Bio-Medical/MEMS Healthcare
Generative AI
Positioning, Navigation and Timing
Automotive
Testing
Machine Learning ML
Sustainability (smart buildings, spaces, cities, and agriculture)

WHO SHOULD ATTEND?
CEO ● Chairmen ● Presidents ● Senior Executives ● Executive Vice Presidents ● CTO ● Startup Founders ● Financial Analysts ● Market Researchers ● Consulting Firms
REGISTER HERE

Future.Industry 2026
2026-03-31 | Virtual
Forward Together

As your trusted Altair technology joins Siemens, the world’s #1 industrial software company, we’re poised to help you create faster, build smarter, and scale beyond what we ever imagined, together.

Tuesday Mar 31, 2026 I 3 time zones I 8 languages

The power of possibility

For forty years, Altair customers have explored the science of possibility. Leveraging the convergence of rocket science and data science, propelled by high-performance computing, together we have made the impossible, possible.
Altair’s capabilities in simulation, high-performance computing, data science and artificial intelligence together with Siemens Xcelerator is set to create the world’s most complete AI-powered design and simulation portfolio.
Join us for the Future.Industry virtual event with a global audience from over 25 countries, to learn about the next chapter in design and simulation.

REGISTER HERE

CHERI Blossoms Conference 2026
2026-03-25 - 2026-03-27 | University of Cambridge, The Old Schools, Trinity Ln, Cambridge, CB2 1TN, United Kingdom
Location: Department of Computer Science and Technology – William Gates Building, University of Cambridge, Cambridge, UK

Conference Overview

Join us at the CHERI Blossoms Conference 2026, the must-attend event for forward-thinking decision-makers and innovators! This exclusive gathering is tailored for industry leaders, business strategists, product managers, researchers and technologists, who are poised to influence the future of digital security by design.
At this premier event, you’ll have the unique opportunity to engage with top experts and gain firsthand insights into the latest developments using CHERI (Capability Hardware Enhanced RISC Instructions) technology. Discover how these cutting-edge advancements are revolutionizing the creation of resilient, secure systems and learn how integrating these innovations can provide a competitive edge for your organization.
The CHERI Research Centre at the Computer Laboratory, Codasip, and lowRISC are hosting a hands-on tutorial the day before CHERI Blossoms 2026. Designed for students, researchers, and developers, the session covers CHERI and CHERIoT, memory safety, compartmentalisation, and related hardware-software stacks, with presentations, code examples, and guided exercises. Register here.
Don’t miss this chance to network with key players, forge strategic collaborations, and drive technological progress that will redefine cybersecurity. Be part of the conversation that matters and position your organization at the forefront of this transformative industry shift!

Agenda

The main conference runs over two consecutive days (Thursday and Friday), with the exhibition space open throughout.
We are also running a “Hands-on Introduction to CHERI and CHERIoT” on the Wednesday, which participants must register for separately.
Each day of the conference has a distinct focus:
Pre-Conference Tutorial (Wednesday 25th March 2026)

Hands-on Introduction to CHERI and CHERIoT (requires participants to pre-register separately from the main conference)

Main Conference – Day 1 (Thursday 26th March 2026)

Keynotes and general / business-focused sessions
CHERI Project 15th Birthday Party (including a light dinner)

Main Conference – Day 2 (Friday 27th March 2026)

Technical sessions

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SEMICON China 2026
2026-03-25 - 2026-03-27 | Shanghai New International Expo Centre, 2345 Longyang Rd, Shanghai, Pudong, China
SEMICON China attracts the world’s leading technology companies who design, develop, manufacture, and supply the technologies to manufacture the microelectronics that drive today’s most sophisticated consumer and commercial electronic products.
REGISTER HERE

RSAC 2026
2026-03-23 - 2026-03-26 | Moscone Center, 747 Howard Street, San Francisco, CA, United States
The Power of Community Starts with You:
Registration for RSAC 2026 is Now Open!
Ideas become breakthroughs when shared. Challenges become opportunities when tackled together. That’s the Power of Community—a key focus for RSAC™ 2026 Conference. Real change happens when cybersecurity professionals unite.
Whether you’re an RSAC™ Conference first-timer or a returning attendee you won’t want to miss what’s in store for RSAC 2026.
REGISTER HERE

APEC 2026
2026-03-22 - 2026-03-26 | Henry B. González Convention Center, 900 E Market St, San Antonio, TX, 78205, United States
Focusing on the practical and applied aspects of the power electronics business. This is not just a designer’s conference; APEC has something of interest for anyone involved in power electronics.

Dear Colleagues,
It is my great honor to welcome you to San Antonio for the 41st IEEE Applied Power Electronics Conference and Exposition (APEC). Serving as the General Chair of APEC 2026 is both a privilege and a personal milestone in my journey in the power electronics community.
My first APEC was in 2003 when I was a Ph.D. student, presenting my first conference paper at an international venue. I still remember the excitement of meeting researchers, engineers, and industry leaders who shaped the field. That experience inspired me to continue my path in power electronics and has guided my career ever since. After becoming a professor myself, I have encouraged my students to present their work at APEC, and I am especially proud that they have received 12 Outstanding Presentation Awards. These achievements reflect both their dedication and the supportive environment of the conference. Together, these experiences have deepened my connection to APEC and strengthened my belief in its role in nurturing talent and advancing the field.
After 41 years, APEC has grown into one of the largest technical conferences in North America, with more than 5,000 participants from over 50 countries each year. The scale of the conference reflects the energy and innovation of the power electronics community. Here, engineers, researchers, students, and business leaders come together to learn, share, and build the future of power electronics.
The technical program at APEC spans the entire landscape of power electronics, from milliwatts to megawatts, and from low voltage to high voltage. Applications range from consumer electronics to data centers, electric vehicles, the modern power grid, electrified aircraft, space exploration, and many more.

The Technical Sessions at APEC feature more than 570 high-quality papers, making the APEC Proceedings the most valuable conference collection in power electronics, as reflected in the Scientific Journal Ranking (SJR).
The Industry Sessions are a unique strength of APEC. With more than 180 presentations, they provide insights from industry researchers and leading academic experts, bridging the gap between research and practice and highlighting the real-world impact of power electronics.
APEC also offers 18 in-depth, 3.5-hour Professional Education Seminars, delivered by renowned speakers who are leading researchers in both academia and industry.
The plenary keynotes at APEC deliver vision and inspiration from global leaders who are shaping the future of the field.

The Exhibition at APEC is the largest power electronics showcase in North America, featuring around 300 companies as exhibitors. It offers an unmatched opportunity to explore the latest products, solutions, and technologies shaping the future of our field.
This year we have invested significantly in student activities. The Student Mentorship Program, the Student Travel Award, the Student Job Fair, and the Student Session Assistance Program will provide opportunities for students to grow and engage. We are also excited to introduce the Student Demonstration Competition for the first time at APEC, creating a new platform for students to showcase their talents and connect with industry.
At APEC 2026, we continue to support professional development for all. The Young Professionals program and the Women in Engineering events provide valuable opportunities to learn, connect, and grow.
I invite you to take full advantage of all that APEC 2026 offers, whether it is the technical sessions, the industry presentations, the exhibition, or the networking opportunities. I hope you will leave San Antonio with new ideas, new collaborations, and renewed energy for the work ahead.
Thank you for being part of APEC 2026. Together, we will continue to advance the field of power electronics.
Sincerely,

Jin Wang
General Chair, APEC 2026
IEEE Fellow, Distinguished Professor of Engineering
The Ohio State University

REGISTER HERE

IRPS 2026
2026-03-22 - 2026-03-26 | Loews Ventana Canyon Resort, Loews Ventana Canyon Resort, 7000 N Resort Dr, Tuscon, AZ, 85750, United States
About IRPS
For over 60 years, IRPS has been the premiere conference for engineers and scientists to present new and original work in the area of microelectronics reliability. Drawing participants from the United States, Europe, Asia, and all other parts of the world, IRPS seeks to understand the reliability of semiconductor devices, integrated circuits, and microelectronic systems through an improved understanding of both the physics of failure as well as the application environment.
IRPS provides numerous opportunities for attendees to increase their knowledge and understanding of all aspects of microelectronics reliability. It is also an outstanding chance to meet and network with reliability colleagues from around the world.
IRPS 2026 focus topics:

New materials: 2D transition metal dichalcogenides (TMDs), (semi)conducting oxides (IGZO, ITO, IWO, InOx, others), (anti)ferroelectrics, low-k dielectrics, reliability of capacitors, junctions, FETs
3D packaging and heterogeneous integration: Reliability of 3D, enhanced 2D, chiplets, Si bridge, interposer, RDL technology, hybrid bonding, micro-bump, Cu-pillar and other interconnects
Data Center Reliability: Emerging trends in Reliability/Availability/Serviceability, silent data corruption, reliability at scale, AI and HPC workloads, On-chip telemetry, thermals, SER

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Wide-Bandgap Developer Forum 2026
2026-03-17 09:00 - 17:00 (America/Los_Angeles) | Virtual
Join us again this year as our experts spend a whole day sharing their technical knowledge and expertise in SiC and GaN technology and in a wide range of applications.
For those who attend every year, it will once again be an exciting, technically challenging day focused on wide-bandgap technology.
For newcomers, it marks the start of a new series of events that has been growing in popularity for years.
The keynote speech by our division presidents Dr. Peter Wawer (Green Industrial Power) and Adam White (Power & Sensor Systems) will open the event live from our studio in Munich.
Registration begins in early February.
In the meantime, we invite you to join the Infineon Developer Community and reach out to our experts. Simply post your questions in the dedicated SiC or GaN forums and our community around the world will get back to you with answers.

Who should attend

This forum is ideal for:

R&D Engineers
Design Engineers
Pre-development Engineers
Application Engineers
Product Designers
Technical Researchers
Design Houses

REGISTER HERE

2026 International Conference on Frontiers of Characterization and Metrology for Nanoelectronics (FCMN)
2026-03-16 - 2026-03-19 | Monterey Marriott, 350 Calle Principal, Monterey, CA, United States
Overview

The 2026 International Conference on Frontiers of Characterization and Metrology for Nanoelectronics (FCMN) will be held at the Monterey Marriott in Monterey, CA from March 16-19, 2026.
The FCMN will bring together scientists and engineers interested in all aspects of the characterization technology needed for nanoelectronic materials and device research, development, integration, and manufacturing. All approaches are welcome: chemical, physical, electrical, magnetic, optical, in situ, and real-time control and monitoring. The semiconductor industry is evolving rapidly: the conference will highlight major issues and provide critical reviews of important materials and structure characterization and nearline/inline metrology methods, including hardware, data analysis, and AI and machine learning, as the industry both extends the technology deep into the nanoscale and increases the diversity of devices and systems.
The conference consists of formal invited presentation sessions and poster sessions for contributed papers. The poster papers cover new developments in materials and structure characterization/metrology down to the nanoscale. The conference began in 1995, and this meeting is the 15th in the series.

Testimonials
“There were a total of 34 talks and 81 poster presentations that summarized major issues and provided critical reviews of crucial semiconductor developments and techniques needed as the industry evolves to silicon nanoelectronics and beyond.”
-Alex Braun, “A Jaunt Through Nanotechnopolis,” Semiconductor International.
“If you want to meet, greet, and learn from the world‘s experts in metrology, this is the place to be.”
-Dan Hutcheson, The Chip Insider.

REGISTER HERE

NVIDIA GTC AI Conference
2026-03-16 - 2026-03-19 | San Jose Convention Center, 150 W San Carlos St, San Jose, CA, 95113, United States
NVIDIA GTC is the premier global AI conference, where developers, researchers, and business leaders come together to explore the next wave of AI innovation. From physical AI and AI factories to agentic AI and inference, GTC 2026 will showcase the breakthroughs shaping every industry.
Join us in venues throughout downtown San Jose for inspiring sessions, hands-on training, and opportunities to connect with experts and peers—and be part of the unique GTC experience.
REGISTER HERE

The Samson International Smart Mobility Summit
2026-03-16 - 2026-03-17 | Expo Tel Aviv, Expo Tel Aviv, Rokach Blvd 101, Tel Aviv-Yafo, Israel
Experience:

Tech exhibition featuring 100+ groundbreaking mobility startups
Keynote speakers, Panels and Robust discussions on emerging themes
Tailored satellite events, B2B engagements, site visits and curated forums
Welcoming remarks by the Minister of Transport & Road Safety
A global audience of mobility movers and shakers for immersive networking and business opportunities

Step into the mobility Revolution with AI, sustainability and the changing economics of movement.
From cutting-edge startups to industry giants, global investors to policymakers — this is where the smart mobility ecosystem comes together to connect, showcase new technologies, and drive revolutionary collaborations in the land of innovation.
About the Samson International Smart Mobility Summit

The 9th Annual Sheila and Eric Samson International Smart Mobility Summit will take place on 16-17 March 2026 in Tel Aviv – Israel.
The Samson Smart Mobility Summit is one of the leading global platforms for discussion on the future of mobility. It gathers the most distinguished decision-makers, preeminent business leaders, innovators, policymakers, and academia to explore the trends shaping mobility in the 21st century.
The Summit will highlight the themes of innovation in transportation and the evolution of smart mobility solutions and business models. We will explore the challenges, opportunities, and implications of efforts worldwide, examining research and innovation and discussing how policymaking, global coalitions, and smart investments can create value for the smart mobility ecosystem worldwide.
The core issues that will be discussed this year will be:

Revolutionizing Traffic Management: Harnessing Innovative Technologies to Reduce Congestion and Road Accidents
Innovative Sustainable Sources of Energy for Mobility: The Road Ahead to Level 5 Autonomy
Taking to the Skies: The Promise and Challenges of Urban Air Mobility
Efficient and Connected: The Role of Intelligent Mobility in Building Smarter Cities
Cyber Security for Intelligent Mobility Systems
Big Data: Accelerating the Transition to Intelligent Transportation
How Public Policy Can Foster Innovation and Drive the Adoption of New Mobility Technologies
Scaling Up and Going Global: A Peak into Leading Israeli Companies’ Successes and Challenges

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Semitracks Course: EOS, ESD and How to Differentiate
2026-03-16 - 2026-03-17 | Munich, Germany, Munich, Germany
Electrical Overstress (EOS) and Electrostatic Discharge (ESD) account for most of the field failures observed in the electronics industry. Although EOS and ESD damage can at times look quite similar to each other, the source each and the solution can be quite different. Therefore, it is important to be able to distinguish between the two mechanisms. The semiconductor industry needs knowledgeable engineers and scientists to understand these issues. EOS, ESD and How to Differentiate is a 2-day course that offers detailed instruction on EOS, ESD and how to distinguish between them. This course is designed for every manager, engineer, and technician concerned with EOS, ESD, analyzing field returns, determining impact, and developing mitigation techniques.

What Will I Learn By Taking This Class?
Participants will learn to develop the skills to determine what constitutes good EOS and ESD design, how to recognize devices that can reduce EOS and ESD susceptibility, and how to design new EOS and ESD structures for a variety of technologies. This skill-building series is divided into five segments:

Overview of the EOS Failure Mechanism. Participants will learn the fundamentals of EOS, the physics behind overstress conditions, sources of EOS, test equipment, and the results of failure.
Overview of the ESD Failure Mechanism. Participants will learn the fundamentals of ESD, the physics behind static generation and discharge, test equipment, test protocols, and the results of failure.
ESD Circuit Design Issues. Participants will learn how designers develop circuits to protect against ESD damage. This includes MOSFETs, diodes, off-chip driver circuits, receiver circuits, and power clamps.
How to Differentiate. Participants will learn how to tell the difference between EOS and ESD. They will learn how to simulate damage and interpret pulse widths, amplitudes and polarity.
Resolving EOS and ESD on the Manufacturing Floor. Participants will see a number of common problems and their origins.

Course Objectives

This course will provide participants with an in-depth understanding of electrical overstress, the models used for EOS, and the manifestation of the mechanism.
Participants will be able to understand the ESD failure mechanism, test structures, equipment, and testing methods used to achieve robust ESD resistance in today’s components.
This course will identify the major issues associated with ESD, explain how they occur, how they are modeled, and how they are mitigated.
Participants will be able to identify basic ESD structures and how they are used to help reduce ESD susceptibility on semiconductor devices.
Participants will be able to distinguish between EOS and ESD when performing a failure analysis.
Participants will be able to estimate a pulse width, pulse amplitude, and determine the polarity of an EOS or ESD event.
Participants will see examples of common problems that result in EOS and ESD in the manufacturing environment.

REGISTER HERE

OFC 2026
2026-03-15 - 2026-03-19 | Los Angeles Convention Center, 1201 S Figueroa St, Los Angeles, 90015
Explore the Ever-Expanding Optical Networking and Communications Industry
Plenary Session
Esteemed industry luminaries from Coherent, NVIDIA and Tesat-Spacecom will headline the event Tuesday, 17 March. These distinguished speakers will explore cutting-edge technologies, and provide invaluable insights into the evolving landscape of optical networking and communications. Learn more.
The Exhibition
The exhibition features more than 700 industry-leading companies representing the entire ecosystem of optical networking and communications. At OFC, attendees have the opportunity to explore groundbreaking technologies, innovative optical networking solutions, specialty fiber products, optical components, devices, systems, test equipment and software.
As a global event, OFC provides startups with the opportunity to debut while industry leaders set the pace for the future. It includes unveiling pioneering trends that will define the industry’s trajectory and offer solutions to critical global issues such as quantum networking, artificial intelligence (AI), space optics and data center connectivity. View the exhibition floorplan.
Theater Programs
The business of networking-focused programming provides valuable insights into current market trends and emerging technologies. Market Watch, Network Operator Summit and the Data Center Summit offer perspectives from industry leaders and experts in the field, highlighting the industry’s current environment and its future. View the theater program listings.
The Conference
OFC’s technical conference has something for everyone. From interactive workshops to symposia, from special sessions to tutorials. OFC offers an array of industry discussions around hot topics like generative AI and ML for optical networking, subsea networks, data center architectures, space optics, quantum communications and more.
There has been a notable emphasis on energy efficiency to address the escalating power consumption challenges in data centers, particularly due to the increased capacity needs and the expansion of AI-driven applications. Look for special sessions, workshops, tutorials and invited speaker discussions that explore innovative technologies such as linear drive pluggable optics (LPO), co-packaged optics (CPO), optical switching and other emerging solutions aimed at reducing power consumption in optical interfaces within the network. View the conference program listings.
Online Access to Content
OFC is held in-person but offers on-demand content at the conclusion of the conference. All technical program sessions will be available on-demand to Full Conference registrants. View the OFC archives.
Future Dates
07 – 11 March 2027 | Los Angeles Convention Center | Los Angeles, California, USA
26 – 30 March 2028 | Los Angeles Convention Center | Los Angeles, California, USA
REGISTER HERE

LID Silicon Valley 2026
2026-03-12 | SEMI World Headquarters, 673 South Milpitas Blvd, Milpitas, CA, United States
Why you should attend

Step into the future of industry at “The Semiconductor Revolution Behind AI Factories”. Hear from CEA-Leti and global experts on AI chip architectures, 3D ICs, optical sensing, and silicon photonics.

Gain insights that could shape your company’s next big move. Don’t miss the chance to connect with the minds driving the next industrial revolution.

REGISTER HERE

Webinar: Shift-Left Compute Subsystem RTL Sign-Off with Software Aware VIP
2026-03-11 08:00 - 09:00 | Online
Wednesday, March 11 – 8:00 AM Pacific
Design and verification teams consistently tell us that compute subsystems require software bring up much earlier than ever before. They need UEFI and Linux to run in simulation, they need protocol accuracy from day one, and they need a predictable path to signoff while integration risks rise every quarter. This struggle has become a shared industry reality.
In this session we present a scalable methodology to accelerate the development and verification of Compute Subsystems such as Arm® Neoverse™ V3 Compute Subsystem (CSS)-based designs, with a shift-left in simulation and signoff using Avery Protocol VIP, CSS VIP, Software Aware VIP, Arm Fast Models and QEMU models.
This methodology helps teams reduce integration risks, shorten turnaround time, and gain system level confidence long before moving to emulation or prototypes. If you are a design or verification engineer, a firmware engineer or if you manage a team building next generation compute platforms, this is an event that will strengthen your technical path forward.
What You Will Learn:

Software Aware Verification IP and applications.
Block level / Subsystem Compliance Testing with Software Aware VIP.
Full CSS HW/FW/SW bring up and UEFI Bootup.
Advanced debug of Hardware/Firmware/Software.

Who Should Attend:

Verification Managers and Directors.
Design and Verification Engineers.
Firmware/Software Engineers.

Products Covered:

Avery Verification IP.
Software Aware VIP.
System VIP (CSS).

Speakers:

Luis E. Rodriguez
Technical Product Manager, Siemens EDA

Luis E. Rodriguez is a Technical Product Manager at Siemens EDA.
Luis has 17+ years of experience in SoC and IP functional verification, specializing in developing market‑leading Verification IP.
He has contributed to protocol workgroups including PCIe, CCIX, Gen‑Z, and CXL, where he helped define CXL 2.0 compliance testing.
At Siemens, he focuses on partnerships and solutions for Software‑Aware VIP and supports cross‑functional integration of Verification IP with Siemens EDA tools and emerging Agentic AI.
He holds his master’s degree in computer science from National Taiwan University.

Amit Tanwar
Software Architect, Siemens EDA

Amit Tanwar is a Software Architect at Siemens EDA.
Amit has 18 years of experience in PCI Express and UVM/SystemVerilog‑based Verification IP development.
He specializes in building high‑performance, scalable, and software‑aware VIP solutions, and has contributed to multiple generations of advanced verification architectures across the semiconductor industry.

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SNUG Silicon Valley
2026-03-11 - 2026-03-12 | Santa Clara Convention Center, Santa Clara Convention Center, 5001 Great America Pkwy, Santa Clara, CA, United States
For more than three decades, SNUG Silicon Valley has connected engineers, designers, and thought leaders with technical experts to network and share best practices for tackling design and verification challenges using Synopsys technologies. The Call for Content invites you to showcase how you are developing tomorrow’s products today with Synopsys solutions.
This year, in addition to our traditional SNUG program, we are excited to welcome Ansys users to the March 2026 event, which will also feature topics aligned with Simulation World as part of our expanding content offerings and growing community.
REGISTER HERE

Silicon Chip Industry Workshop
2026-03-10 09:30 - 16:00 | Holiday Inn – Kensington High Street, Holiday Inn - Kensington High, Wrights LaneStreet,, London, W8 5SP, United Kingdom
Join Us At The Next Silicon Chip Industry Workshop
10 March 2026 9:30-16:00. Registration from 9am.
Please see our brochure for further information.
Please register me for the Silicon Chip Industry Awareness Workshop:
Email: mail@futurehorizons.com
Tel: +44 1732 740440
Holiday Inn, Kensington High Street, Wrights Lane, London, W8 5SP
About the Workshop
This one-day semiconductor workshop provides delegates with a grounding in the basic fundamentals of the Integrated Circuit industry, its workings, technology, markets and importance.
Workshop Benefits

We guarantee you will leave the workshop with a greater understanding of the IC industry, increasing your industry ‘know-how’ and efficiency levels
You will gain a comprehensive understanding of industry terminology, enabling you to talk the industry language
Increased confidence levels allows you to execute day-to-day operations with finesse
Renews enthusiasm & increases staff morale
Employees will have a greater understanding of supplier jargon & can negotiate better deals
Client’s needs are successfully met resulting in repeat business and referrals

For further benefits of attending the forecast, click here.
“It was great! I can’t remember a seminar of a similar density”.
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What Will I Learn?
Presented in layman terms, the one day Silicon Chip Industry Workshop provides delegates with:

A grounding in the basic fundamentals of the electronics and Integrated Circuit industry, from theory to market application.
An insight into the semiconductor manufacturing process, semiconductor technology and equipment, the industry economics and an understanding of the IT revolution and industry trends.
A comprehensive understanding of industry terminology, enabling you to talk the industry talk.
To enhance delegate understanding audience interaction is encouraged and semiconductor devices, material samples and other visual aids are used throughout the workshop.

Who Should Attend?
The workshop is aimed at individuals working within the semiconductor and information technology (IT) industries. It is suitable for those looking for an introduction to the semiconductor industry, to those with a specialist focus needing an industry overview.
For added convenience all our semiconductor workshops and forecast events are still available in-house, please call +44 1732 740440 or >email us today.
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embedded world 2026
2026-03-10 - 2026-03-12 | Exhibition Centre Nuremberg, Exhibition Centre Nuremberg, Messezentrum 1, Nürnberg, 90471, Germany
Global platform for the embedded community
The embedded world Exhibition&Conference provides a global platform and a place to meet for the entire embedded community, including leading experts, key players and industry associations. It offers unprecedented insight into the world of embedded systems, from components and modules to operating systems, hardware and software design, M2M communication, services, and various issues related to complex system design.
Its expertise and sharp focus on technologies, processes and future-oriented products make it unparalleled in international comparisons – and THE must-attend event for developers, system architects, product managers and technical management.

The No. 1 hub for the international embedded community

As the global platform and the industry place to meet for the embedded community, embedded world attracts the top experts, key players and industry associations from all over the world.
Become part of the community and use THE industry platform to network and make valuable business contacts!

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GOMACTech 2026
2026-03-09 - 2026-03-12 | New Orleans Ernest N. Morial Convention Center, New Orleans Ernest N. Morial Convention Center, 900 Convention Center Blvd, New Orleans, LA, 70130, United States
GOMACTech (Government Microcircuit Applications & Critical Technology Conference)
“Beyond the Noise”

GOMACTech was established primarily to review developments in microcircuit applications for government systems. Established in 1968, the conference has focused on advances in systems being developed by the Department of Defense and other government agencies and has been used to announce major government microelectronics initiatives such as VHSIC and MIMIC, and provides a forum for government reviews.

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Semitracks Course: Semiconductor Reliability and Product Qualification
2026-03-09 - 2026-03-12 | Munich, Germany, Munich, Germany
Product reliability and qualification continues to evolve with the electronics industry. New electronics applications require new approaches to reliability and qualification. In the past, reliability meant discovering, characterizing and modeling failure mechanisms, and determining their impact on the reliability of the circuit. Today, reliability can involve tradeoffs between performance and reliability; assessing the impact of new materials; dealing with limited margins, and other factors. This requires information on subjects like: statistics, testing, technology, processing, materials science, chemistry, and customer expectations. While customers expect high reliability levels, incorrect testing, calculations, and qualification procedures can severely impact reliability. Semiconductor Reliability and Product Qualification is a 4-day course that offers detailed instruction on a variety of subjects pertaining to semiconductor reliability and qualification. This course is designed for every manager, engineer, and technician concerned with reliability in the semiconductor field, qualifying semiconductor components, or supplying tools to the industry.

What Will I Learn By Taking This Class?
Participants will learn to develop the skills to determine what failure mechanisms might occur, and how to test for them, develop models for them, and eliminate them from the product. This skill building series is divided into four segments:

Overview of Reliability and Statistics. Participants will learn the fundamentals of statistics, sample sizes, distributions and their parameters.
Failure Mechanisms. Participants will learn the nature and manifestation of a variety of failure mechanisms that can occur both at the die and at the package level. These include: time-dependent dielectric breakdown, hot carrier degradation, electromigration, stress-induced voiding, moisture, corrosion, contamination, thermomechanical effects, interfacial fatigue, and others.
Qualification Principles. Participants will learn how test structures can be designed to help test for a particular failure mechanism.
Test Strategies. Participants will learn about the JEDEC test standards, how to design screening tests, and how to perform burn-in testing effectively.

Course Objectives

This course will provide participants with an in-depth understanding of the failure mechanisms, test structures, equipment, and testing methods used to achieve today’s high reliability components.
Participants will be able to gather data, determine how best to plot the data and make inferences from that data.
This course will identify the major failure mechanisms, explain how they are observed, how they are modeled, and how they are eliminated.
This course will offer a variety of video demonstrations of analysis techniques, so the participants can get an understanding of the types of results they might expect to see with their equipment.
Participants will be able to identify the steps and create a basic qualification process for semiconductor devices.
Participants will be able to knowledgeably implement screens that are appropriate to assure the reliability of a component.
Participants will be able to identify appropriate tools to purchase when starting or expanding a laboratory.

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Webinar: Intelligent Networks: Power, Reliability & Maintenance in Telecom
2026-03-03 10:00 - 11:00 | Online
About
As global connectivity demands surge, network infrastructure hardware is under unprecedented pressure to deliver higher performance, lower latency, and greater energy efficiency, while remaining cost-effective and reliable. This challenge is compounded with the explosive growth of AI applications, emerging 5G and 6G architectures, virtualization and open interfaces, adding further strain on legacy systems and supply chains that were never built for this pace of evolution. As reliability remains the primary KPI, providers must shift from a reactive replacement model to a predictive maintenance model.
Join our panel of industry experts as they explore the multidimensional challenges of designing, deploying, and maintaining network infrastructure in this new era, focusing on:
• Power efficiency and thermal optimization across silicon, networks, and data centers
• Proactive monitoring and predictive analytics
• Requirements for HW and SW co design in next generation architectures
• Balancing sustainability goals with total cost of ownership
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22nd Annual Device Packaging Conference (DPC 2026)
2026-03-02 - 2026-03-05 | Sheraton Grand at Wild Horse Pass, Sheraton Grand at Wild Horse Pass, 5594 W Wild Horse Pass Blvd., Phoenix, AZ, 85226, United States
The 22nd Annual Device Packaging Conference (DPC 2026) will be held in Phoenix, Arizona, on March 2-5, 2026. It is an international event organized by the International Microelectronics Assembly and Packaging Society (IMAPS). The conference is a major forum for the exchange of knowledge and provides numerous technical, social and networking opportunities for meeting leading experts in these fields. People who will benefit from this conference include: scientists, process engineers, product engineers, manufacturing engineers, professors, students, business managers, and sales & marketing professionals. The 2026 conference will feature 4 keynote presentations, an embedded Global Business Council Plenary Session, an interactive poster session, an evening panel discussion, and more.
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MWC 2026
2026-03-02 - 2026-03-05 | Fira Gran Via, Barcelona, Fira Gran Via, Av. Joan Carles I, 64, Barcelona, 08908, Spain
Making way for The IQ Era

Much can happen in a year within our ecosystem of innovation and connectivity. As we build on the success of MWC25 and engage with MWC26 to activate a new theme – The IQ Era – the world is already shifting to greater heights of digital awareness.
In this new age of intelligence, the way to a better future is through smarter connection: human ideas leading technology, commercial impact and societal progress. MWC is where leaders of nations, business and technology assemble, and collective knowledge collaborates – make your insight count in The IQ Era.
Why attend MWC Barcelona?
From eye-opening innovation to mind-expanding ideas, global policy to lasting partnerships, it all starts here. Whether you’re a key player in the connectivity ecosystem, adjacent industries or the wider world of tech, you’ll find all you need and more at MWC.

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DVCON U.S. 2026
2026-03-02 - 2026-03-05 | Hyatt Regency Hotel, Santa Clara, CA, Santa Clara, CA, United States
DVCon is the premier conference on the application of languages, tools, and methodologies for the design and verification of electronic systems and integrated circuits. The focus of the conference is the usage of specialized design and verification languages such as SystemVerilog, Verilog, VHDL, PSS, SystemC and e, as well as general purpose languages such as C, C++, Python, PERL and Tcl. Tools and methodologies include the use of artificial intelligence, machine learning, open-source software, hardware and architecture, testbench automation, hardware-assisted verification, hardware/software co-verification, formal verification, functional safety and security, transaction-level system design, high level synthesis, low power design techniques, 3D chip designs, IP-based SoC design methods, reference flows and Mixed Signal design and verification.
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Semitracks Course: Failure and Yield Analysis
2026-03-02 - 2026-03-05 | Munich, Germany, Munich, Germany
Failure and Yield Analysis is an increasingly difficult and complex process. Today, engineers are required to locate defects on complex integrated circuits. In many ways, this is akin to locating a needle in a haystack, where the needles get smaller and the haystack gets bigger every year. Engineers are required to understand a variety of disciplines in order to effectively perform failure analysis. This requires knowledge of subjects like: design, testing, technology, processing, materials science, chemistry, and even optics! Failed devices and low yields can lead to customer returns and idle manufacturing lines that can cost a company millions of dollars a day. Your industry needs competent analysts to help solve these problems. Failure and Yield Analysis is a 4-day course that offers detailed instruction on a variety of effective tools, as well as the overall process flow for locating and characterizing the defect responsible for the failure. This course is designed for every manager, engineer, and technician working in the semiconductor field, using semiconductor components or supplying tools to the industry.
By focusing on a Do It Right the First Time approach to the analysis, participants will learn the appropriate methodology to successfully locate defects, characterize them, and determine the root cause of failure.

What Will I Learn By Taking This Class?
Participants will learn to develop the skills to determine what tools and techniques should be applied, and when they should be applied. This skill-building series is divided into three segments:

The Process of Failure and Yield Analysis. Participants will learn to recognize correct philosophical principles that lead to a successful analysis. This includes concepts like destructive vs. non-destructive techniques, fast techniques vs. brute force techniques, and correct verification.
The Tools and Techniques. Participants will learn the strengths and weaknesses of a variety of tools used for analysis, including electrical testing techniques, package analysis tools, light emission, electron beam tools, optical beam tools, decapping and sample preparation, and surface science tools.
Case Histories. Participants will identify how to use their knowledge through the case histories. They will learn to identify key pieces of information that allow them to determine the possible cause of failure and how to proceed.

Course Objectives

This course will provide participants with an in-depth understanding of the tools, techniques and processes used in failure and yield analysis.
Participants will be able to determine how to proceed with a submitted request for analysis, ensuring that the analysis is done with the greatest probability of success.
This course will identify the advantages and disadvantages of a wide variety of tools and techniques that are used for failure and yield analysis.
This course will offer a wide variety of video demonstrations of analysis techniques, so the analyst can get an understanding of the types of results they might expect to see with their equipment.
Participants will be able to identify basic technology features on semiconductor devices.
Participants will be able to identify a variety of different failure mechanisms and how they manifest themselves.
Participants will be able to identify appropriate tools to purchase when starting or expanding a laboratory.

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