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X-WR-CALDESC:Events for SemiWiki
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BEGIN:VEVENT
DTSTART;VALUE=DATE:20260921
DTEND;VALUE=DATE:20260923
DTSTAMP:20260707T021738Z
CREATED:20260707T021738Z
LAST-MODIFIED:20260707T021738Z
UID:370972-1789948800-1790121599@semiwiki.com
SUMMARY:Advanced CMOS/FinFET Fabrication
DESCRIPTION:Semiconductor and integrated circuit developments continue to proceed at an incredible pace. For example\, today’s microprocessor chips have one thousand times the processing power of those a decade ago. These challenges have been accomplished because of the integrated circuit industry’s ability to track something known as Moore’s Law. Moore’s Law states that an integrated circuit’s processing power will double every two years. This has been accomplished by making devices smaller and smaller. The question looming in everyone’s mind is “How far into the future can this continue?” Advanced CMOS/FinFET Fabrication is a 2-day course that offers detailed instruction on the processing used in a modern integrated circuit\, and the processing technologies required to make them. We place special emphasis on current issues related to manufacturing the next generation devices. This course is a must for every manager\, engineer and technician working in the semiconductor industry\, using semiconductor components or supplying tools to the industry. \nBy concentrating on the latest developments in CMOS and FinFET technology\, participants will learn why FinFETs are fast becoming the technologies of choice at feature sizes below 20nm. Our instructors work hard to explain semiconductor processing without delving heavily into the complex physics and materials science that normally accompany this discipline. \n\n\nWhat Will I Learn By Taking This Class?\nParticipants will learn basic\, but powerful\, aspects about CMOS fabrication and FinFET technology. This skill-building series is divided into four segments: \n\nFront End Of Line (FEOL) Overview. Participants will study the major developments associated with FEOL processing\, including Ion Implantation\, Rapid Thermal Annealing (RTA) for implants and silicides\, and Pulsed Plasma Doping. They will also study alternate substrate technologies like SOI\, as well as High-k/Metal Gates for improved leakage control.\nBack End Of Line (BEOL) Overview. Participants will study the major developments associated with BEOL processing\, including copper metallization and Low-k Dielectrics. They will learn about why they’re necessary for improved performance.\nFinFET Manufacturing Overview. Participants will learn how semiconductor manufacturers are currently processing FinFET devices and the difficulties associated with three-dimensional structures from a processing and metrology standpoint.\nFinFET Reliability. Participants will study the failure mechanisms and techniques used for studying the reliability of these devices.\n\n\n\n\n\nCourse Objectives\n\nThis course will provide participants with an in-depth understanding of Bulk technology\, SOI technology and the technical issues.\nParticipants will understand how Hi-K/Metal Gate devices are manufactured.\nParticipants will also understand how FinFET devices are manufactured.\nThis course will provide a look into the latest challenges with copper metallization and Low-k dielectrics.\nParticipants will understand the difficulties associated with non-planar structures and methods to alleviate the problems.\nParticipants will be able to make decisions about how to evaluate FinFET devices and what changes are likely to emerge in the coming years.\nParticipants will briefly learn about IC reliability and the failure modes associated with these devices.\nParticipants will see a comparison between FinFETs and new alternatives (such as Gate All Around (GAA) structures and nanosheets).\n\n\n\nREGISTER HERE
URL:https://semiwiki.com/event/advanced-cmos-finfet-fabrication/
LOCATION:Online
ORGANIZER;CN="Semitracks%2C Inc.":MAILTO:info@semitracks.com
END:VEVENT
BEGIN:VEVENT
DTSTART;VALUE=DATE:20260921
DTEND;VALUE=DATE:20260925
DTSTAMP:20260804T031930Z
CREATED:20260804T031930Z
LAST-MODIFIED:20260804T031930Z
UID:371941-1789948800-1790294399@semiwiki.com
SUMMARY:CIGRE Energy Forum International Conference & Exhibition 2026
DESCRIPTION:“Grid Modernization: Enabling Large Loads\, Advanced Storage\, and Smart Technologies for a Secure and Resilient Energy Future” – HOST : Altalink \nWHAT TO EXPECT?\nThe event in Calgary will undoubtedly be larger than previous CIGRE Canada events. The success of the International Symposium in Montreal will benefit development in terms of international delegates (e.g.\, from the US\, India\, and China) as well as Canadian delegates. \nREGISTER HERE
URL:https://semiwiki.com/event/cigre-energy-forum-international-conference-exhibition-2026/
LOCATION:Calgary TELUS Convention Centre\, Calgary TELUS Convention Centre\, 136 8 Ave SE\, Calgary\, Alberta\, T2P 0K6\, Canada
ATTACH;FMTTYPE=image/png:https://semiwiki.com/wp-content/uploads/2026/08/Screenshot-2026-08-03-201730.png
END:VEVENT
BEGIN:VEVENT
DTSTART;VALUE=DATE:20260922
DTEND;VALUE=DATE:20260923
DTSTAMP:20260804T014926Z
CREATED:20260804T014926Z
LAST-MODIFIED:20260804T014926Z
UID:371857-1790035200-1790121599@semiwiki.com
SUMMARY:GlobalFoundries Technology Summit 2026 China
DESCRIPTION:About GTS\n\nHosted across the globe\, GTS is GlobalFoundries’ annual flagship event\, where GF and industry leaders\, technologists\, customers and partners explore how disruptive technologies are shaping intelligent systems and the semiconductor industry as a whole. Each GTS event includes deep dives into the impact of GF’s differentiated solutions\, results and innovations from our customers and end-to-end partner ecosystem across our proven process technologies. \n\nGTS highlights\n\n\nHear from our business leaders – Explore how GF’s purpose-built technologies are shaping pivotal innovations\nExperience immersive keynotes – Attend engaging keynotes from industry-leaders that shed light on industry trends and developments achieved in partnership with GF\nNetwork with our partners across the globe – Connect with our GlobalSolutions™ ecosystem and value-added partners in our partner pavilion and networking events\nEngage with GF technical experts – Dive into immersive technical deep dives with our technologists and partners that showcase upcoming roadmap innovations leveraging GF process technologies\n\nREGISTER HERE
URL:https://semiwiki.com/event/globalfoundries-technology-summit-2026-china/
LOCATION:Shanghai\, China\, Shanghai\, China
ATTACH;FMTTYPE=image/webp:https://semiwiki.com/wp-content/uploads/2026/08/B800-FWEBP.webp
END:VEVENT
BEGIN:VEVENT
DTSTART;VALUE=DATE:20260922
DTEND;VALUE=DATE:20260923
DTSTAMP:20260903T071537Z
CREATED:20260903T071537Z
LAST-MODIFIED:20260903T071537Z
UID:373122-1790035200-1790121599@semiwiki.com
SUMMARY:TUGx - San Jose\, CA
DESCRIPTION:Teradyne Users Group\n\n\n\n\nTUGx Global Seminars are a series of complimentary\, one-day events hosted in key locations around the world. These seminars are designed to bring together local engineering communities and provide a platform for knowledge sharing and collaboration. By hosting these events globally\, Teradyne ensures that customers everywhere have access to the latest advancements in test technology and methodologies. \nEach seminar is tailored to the needs of its regional audience\, delivering content that is both relevant and actionable. Attendees gain insights into best practices\, innovative test strategies\, and emerging trends that can help them optimize their processes. This localized approach ensures that participants leave with practical solutions and ideas that directly address the challenges they face in their own markets. \nBeyond technical learning\, TUGx Global Seminars foster stronger connections between Teradyne and its customers. These events empower users to maximize the value of their Teradyne technology\, while also creating opportunities for networking and collaboration within the industry. By sharing expertise and encouraging dialogue\, Teradyne helps customers stay ahead in a rapidly evolving test environment. \n\n\nREGISTER HERE \n 
URL:https://semiwiki.com/event/tugx-san-jose-ca/
LOCATION:San Jose\, CA\, San Jose\, CA\, United States
ATTACH;FMTTYPE=image/png:https://semiwiki.com/wp-content/uploads/2026/09/Screenshot-2026-09-03-000947.png
END:VEVENT
BEGIN:VEVENT
DTSTART;VALUE=DATE:20260922
DTEND;VALUE=DATE:20260923
DTSTAMP:20260903T071754Z
CREATED:20260903T071754Z
LAST-MODIFIED:20260903T071754Z
UID:373125-1790035200-1790121599@semiwiki.com
SUMMARY:2026 U.S. Executive Forum
DESCRIPTION:Join us in Menlo Park!\nJoin more than 150 semiconductor executives and professionals in Menlo Park\, California\, amid the stunning views of the Santa Cruz Mountains in Northern California. GSA’s U.S. Executive Forum will be held at the Rosewood Sand Hill\, Menlo Park\, in the Rosewood Ballroom. \nREGISTER HERE
URL:https://semiwiki.com/event/2026-u-s-executive-forum/
LOCATION:Rosewood Sand Hill\, 2825 Sand Hill Road\, Menlo Park\, CA\, 94025\, United States
ATTACH;FMTTYPE=image/png:https://semiwiki.com/wp-content/uploads/2026/09/Screenshot-2026-09-03-001637.png
END:VEVENT
BEGIN:VEVENT
DTSTART;VALUE=DATE:20260922
DTEND;VALUE=DATE:20260923
DTSTAMP:20260903T085631Z
CREATED:20260903T085631Z
LAST-MODIFIED:20260903T085631Z
UID:373236-1790035200-1790121599@semiwiki.com
SUMMARY:Webinar: Solid-state transformers: accelerate your SST design
DESCRIPTION:Register now: September 22nd\, 2026 – 2 sessions available \n\nSession 1:  September 22nd\, 2026\, 9 – 10 am CEST\nSession 2: September 22nd\, 2026\, 5 – 6 pm CEST\n\n\n\n\n\n\n\n\n\nJoin our expert-led webinar for an in-depth look at Infineon’s comprehensive portfolio for solid-state transformers (SSTs). Discover how SST technology is enabling next-generation power distribution architectures for AI data centers\, megawatt charging infrastructure\, transformer-less battery energy storage systems\, and more. \nWe will highlight key innovations in power conversion\, control\, and sensing – including our latest high-voltage CoolSiC™ solutions. Learn how Infineon’s system expertise and proven designs help accelerate SST development\, delivering superior efficiency\, compactness\, and long-term reliability for a resilient and sustainable energy ecosystem. \n\n\n\n\nWhat you’ll learn\n\n\n\n\n\n\n\n\n\nKey market trends and requirements shaping the global SST landscape\nOverview of Infineon’s SST portfolio and system-level architecture\nDeep dive into core technologies\, including the high-voltage CoolSiC™ MOSFET EasyPACK™ modules\nHow to speed up development with Infineon’s proof-of-concept designs (gate drivers\, auxiliary power supply\, and more)\n\n\n\n\n\nOur speaker\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n \n \n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\nValerio Zerillo \n\n\n\n\n\n\n\n\nGlobal Application Manager \nValerio Zerillo is the Global Application Manager for Solid-State Transformers and Uninterruptible Power Supplies at Infineon Technologies\, bringing over 15 years of experience in power electronics\, critical infrastructure\, and complex B2B product management. His career spans leadership roles at industry giants such as Vertiv and Emerson\, where he drove product innovation and energy efficiency improvements across large-scale UPS portfolios at both regional and global levels. Valerio holds a Master of Science in Electronics Engineering from the Alma Mater Studiorum – Università di Bologna\, graduating with the highest honors and completing part of his thesis research at Linköping University in Sweden. With a strategic\, customer-centric approach and deep technical expertise\, he is passionate about co-developing scalable solutions that advance the future of smart power infrastructure. \n\n\n\n\n\n\n\n\n\n\n\n\n\n\n \n \n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\nDr. Fanny Bjoerk \n\n\n\n\n\n\n\n\nGlobal Marketing Director \nDr. Fanny Bjoerk is the Global Marketing Director for data center power distribution at Infineon. Fanny joined Infineon in 2003 and has previously held positions in marketing and program management for power devices\, e.g.\, silicon super-junction MOSFETs\, IGBTs and SiC devices. Fanny holds a PhD degree in solid-state electronics and a M. Sc. degree in electrical engineering from the Royal Institute of Technology in Stockholm\, Sweden. \n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\nREGISTER HERE
URL:https://semiwiki.com/event/webinar-solid-state-transformers-accelerate-your-sst-design/
LOCATION:Online
ATTACH;FMTTYPE=image/png:https://semiwiki.com/wp-content/uploads/2026/09/Screenshot-2026-09-03-015528.png
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=America/Los_Angeles:20260922T100000
DTEND;TZID=America/Los_Angeles:20260922T110000
DTSTAMP:20260902T093655Z
CREATED:20260902T093655Z
LAST-MODIFIED:20260902T093655Z
UID:372955-1790071200-1790074800@semiwiki.com
SUMMARY:Webinar: Avestra - Assertion Driven Silicon Success
DESCRIPTION:COMPANY EMAIL REQUIRED FOR REGISTRATION. \nStudies show that nearly 20% of the verification cycle is spent on assertion generation\, debugging\, and methodology integration — work that remains largely manual today or is delegated to general-purpose LLMs that hallucinate more than 30% of the time and produce incorrect assertions. \nWHAT WE WILL COVER\n\nLive demonstration of Avestra Studio generating assertions and coverage on a real design\nHow the 14-agent pipeline analyzes Spec and RTL\, flags inconsistencies\, suggests fixes before simulation\, and generates a tape-out-ready\, production-grade assertion and coverage suite\, as well as a comprehensive SystemVerilog testbench driven by an SVA cover.\nHow Avestra’s proprietary RAG database — built on 22 US patents and 3 SystemVerilog Assertion textbooks — grounds generation and keeps hallucination under 1%\nHow Avestra achieves in minutes what takes days of manual effort for assertion generation.\n\nWHO SHOULD ATTEND\n\nDesign and Verification engineers and managers responsible for assertion development and SVA coverage looking to close the loop between Spec\, RTL\, and verification earlier in the cycle\nSoC/IP verification leads evaluating AI-native tooling for their flows\nVPs of Engineering and Silicon leaders tracking DV cycle time and engineering ROI\n\nSPEAKER\nAshok Mehta\, an SVA domain expert and architect of Avestra\, will lead a live demonstration of a real-world design and answer questions about how customers deploy\, evaluate\, and scale Avestra within their verification flows. Ashok holds 22 granted US patents in design and verification and has authored widely used books on SystemVerilog\, Assertions\, and Functional Coverage. \n*This Webinar is in partnership with SemiWiki and Tuple Technologies* \nREGISTER HERE
URL:https://semiwiki.com/event/webinar-avestra-assertion-driven-silicon-success/
LOCATION:Online
ATTACH;FMTTYPE=image/png:https://semiwiki.com/wp-content/uploads/2026/09/Screenshot-2026-09-02-023550.png
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=America/Los_Angeles:20260922T140000
DTEND;TZID=America/Los_Angeles:20260922T200000
DTSTAMP:20260804T043703Z
CREATED:20260804T043703Z
LAST-MODIFIED:20260804T043703Z
UID:371952-1790085600-1790107200@semiwiki.com
SUMMARY:Drive & Derive: A Keysight x Electro Rent Tech Social
DESCRIPTION:About this event\nStart your next engineering breakthrough with a drink in hand and a driver in the bay. \nJoin us for an after-hours tech social with Keysight experts\, featuring a showcase of Keysight’s latest innovations\, from HD3 oscilloscopes and signal generators to the latest handheld analyzers\, advanced power solutions\, and more. \nThen stick around for hands-on demos\, happy hour\, and time in the golf bays with fellow engineers. \nCome for the drives. Stay for what you’ll derive. \n\n\n\n\n\n\nWho should attend this event?\nFor curious RF and power engineers\, problem-solvers\, and anyone who thinks a great drive pairs well with a great idea. \nREGISTER HERE
URL:https://semiwiki.com/event/drive-derive-a-keysight-x-electro-rent-tech-social/
LOCATION:Schaumburg\, Illinois\, Schaumburg\, IL\, United States
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=America/Los_Angeles:20260922T160000
DTEND;TZID=America/Los_Angeles:20260922T173000
DTSTAMP:20260909T062738Z
CREATED:20260909T062738Z
LAST-MODIFIED:20260909T062738Z
UID:373430-1790092800-1790098200@semiwiki.com
SUMMARY:Webinar: The Ghost in the GDSII: AI's New Role in Physical Design
DESCRIPTION:Every chip ends its journey as a GDSII file — millions of polygons handed to the foundry. But hidden inside today’s layouts is a new kind of intelligence. AI is quietly reshaping physical design: guiding floorplanning and placement\, predicting congestion and timing before a single wire is routed\, and autonomously tuning flows for power\, performance\, and area. \nIn this 1 Hour session\, Silicon Patterns’ Prasanna Kumar Thadapaneni and Kiran Mallavarjula unpack “the ghost in the GDSII” — where machine learning already lives in the back-end flow\, what it means for design teams and the business\, and how to adopt it without giving up the trust and signoff rigor that tape-out demands. \nREGISTER HERE
URL:https://semiwiki.com/event/webinar-the-ghost-in-the-gdsii-ais-new-role-in-physical-design/
LOCATION:Online
ATTACH;FMTTYPE=image/png:https://semiwiki.com/wp-content/uploads/2026/09/Screenshot-2026-09-08-232653.png
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=America/Los_Angeles:20260922T180000
DTEND;TZID=America/Los_Angeles:20260922T210000
DTSTAMP:20260824T080815Z
CREATED:20260824T080815Z
LAST-MODIFIED:20260824T080815Z
UID:372593-1790100000-1790110800@semiwiki.com
SUMMARY:Silicon Photonics Workshop
DESCRIPTION:Overview\n\n\n\n\nGet ready to dive deep into the world of cutting-edge technology and innovation at the Silicon Photonics Workshop organized by Soitec! \n\n\n\n\nSoitec is thrilled to host an exclusive\, private workshop running parallel to ECOC 2026. \nThis year\, we are diving straight into the infrastructure shaping tomorrow’s tech landscape: Scaling Silicon Photonics from Foundry to AI Fabric for Next-Generation Gigawatt Datacenters. \nThe event will bring together pioneering minds and industry titans from across the entire value chain\, featuring insights from Lumentum\, Tower Semiconductor\, IMEC\, CIENA\, and Soitec. \nStay Tuned: The detailed agenda will be officially unveiled one month prior to the event. \n\n\n\nREGISTER HERE
URL:https://semiwiki.com/event/silicon-photonics-workshop/
LOCATION:Hotel NH Málaga\, Hotel NH Málaga\, C. San Jacinto\, 2\, Málaga\, Distrito Centro\, 29007\, Spain
ATTACH;FMTTYPE=image/jpeg:https://semiwiki.com/wp-content/uploads/2026/08/image.jpg
END:VEVENT
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