BEGIN:VCALENDAR
VERSION:2.0
PRODID:-//SemiWiki - ECPv6.17.2//NONSGML v1.0//EN
CALSCALE:GREGORIAN
METHOD:PUBLISH
X-WR-CALNAME:SemiWiki
X-ORIGINAL-URL:https://semiwiki.com
X-WR-CALDESC:Events for SemiWiki
REFRESH-INTERVAL;VALUE=DURATION:PT1H
X-Robots-Tag:noindex
X-PUBLISHED-TTL:PT1H
BEGIN:VTIMEZONE
TZID:America/Los_Angeles
BEGIN:DAYLIGHT
TZOFFSETFROM:-0800
TZOFFSETTO:-0700
TZNAME:PDT
DTSTART:20250309T100000
END:DAYLIGHT
BEGIN:STANDARD
TZOFFSETFROM:-0700
TZOFFSETTO:-0800
TZNAME:PST
DTSTART:20251102T090000
END:STANDARD
BEGIN:DAYLIGHT
TZOFFSETFROM:-0800
TZOFFSETTO:-0700
TZNAME:PDT
DTSTART:20260308T100000
END:DAYLIGHT
BEGIN:STANDARD
TZOFFSETFROM:-0700
TZOFFSETTO:-0800
TZNAME:PST
DTSTART:20261101T090000
END:STANDARD
BEGIN:DAYLIGHT
TZOFFSETFROM:-0800
TZOFFSETTO:-0700
TZNAME:PDT
DTSTART:20270314T100000
END:DAYLIGHT
BEGIN:STANDARD
TZOFFSETFROM:-0700
TZOFFSETTO:-0800
TZNAME:PST
DTSTART:20271107T090000
END:STANDARD
END:VTIMEZONE
BEGIN:VEVENT
DTSTART;VALUE=DATE:20260914
DTEND;VALUE=DATE:20260916
DTSTAMP:20260707T021443Z
CREATED:20260707T021443Z
LAST-MODIFIED:20260707T021443Z
UID:370970-1789344000-1789516799@semiwiki.com
SUMMARY:IC Packaging Technology
DESCRIPTION:Integrated Circuit packaging has always been integral to IC performance and functionality. An IC package serves many purposes: 1) pitch conversion between the fine features of the IC die and the system level interconnection; 2) chemical\, environmental and mechanical protection; 3) heat transfer; 4) power\, ground and signal distribution between the die and system; 5) handling robustness; and 6) die identification among many others. Numerous critical technologies have been developed to serve these functions; technologies that continue to advance with each new requirement for cost reduction\, space savings\, higher speed electrical performance\, finer pitch\, die surface fragility\, new reliability requirements\, and new applications. Packaging engineers must fully understand these technologies to design and fabricate future high-performance packages with high yields at exceptional low-costs to give their company a critical competitive advantage. \nIC Packaging Technology is a 2-day course that details the vital technologies required to construct IC packages in a reliable\, cost effective\, and quick time to market fashion. When completed\, the participant will understand the wide array of technologies available; how technologies interact; what choices must be made for a high-performance product vs. a consumer device; and how such choices impact the manufacturability\, functionality\, and reliability of the finished product. An emphasis will be given to manufacturing; processes; and materials selection\, tailoring\, and development. Each fundamental package family will be discussed\, including flip chip area array technologies\, Wafer Level Packaging (WLP)\, Fan-Out Wafer Level Packaging (FO-WLP)\, and the latest Through Silicon Via (TSV) developments. Additionally\, future directions for each package technology will be highlighted\, along with challenges that must be surmounted to succeed. \n\n\nWhat Will I Learn By Taking This Class?\nBy focusing on current issues in packaging technology\, participants will learn why advances in the industry are occurring along certain lines and not others. Participants will learn about semiconductor packaging without having to delve heavily into the complex physics and materials science that normally accompany this discipline. Participants will learn basic\, but powerful aspects about the semiconductor packaging. This skill-building series is divided into four segments: \n\nMolded Package Technologies. Participants will learn the fundamentals of molding critical to leaded\, leadless\, and area array packaging\, enabling them to eliminate problems such as flash\, incomplete fill\, and wire sweep.\nFlip Chip Technologies. Participants will learn the fundamentals of plating\, bumping\, reflow\, underfill\, and substrate technologies that are required for both high performance and portable products.\nWafer Level Packages. Participants will learn the newest technologies that enable the increasingly popular Wafer Chip Scale Packages (WCSPs) and Fan-Out Wafer Level Packages (FO-WLPs).\nThrough Silicon Via Packages and Future Directions. Participants will understand the latest advances in the recently productized TSV technology\, as well as future directions that will lead to the products of tomorrow.\n\n\n\n\n\nCourse Objectives\n\nThe course will supply participants with an in-depth understanding of package technologies\, current and future.\nPotential defects associated with each package technology will be highlighted to enable the participants to identify and eliminate such issues in product from both internal assembly and OSAT houses.\nCu and solder plating technologies will be described with special emphasis on package applications in Through Silicon Vias (TSVs) and Cu pillars for FO-WLPs. Emphasis will be placed on eliminating issues such as reliability\, non-uniformity\, void-free thermal aging performance\, and contamination-free interfaces.\nNew package processes employed in TSV production will be described\, along with current cost reduction thrusts\, to enable the participants to understand the advantages and limits of the technologies.\nTemporary bonding and wafer thinning processes will be highlighted\, as well as the cost reduction approaches currently being pursued to enable wider adoption of TSV packages.\nThe trade-offs between silicon\, glass\, and organic interposers will be highlighted\, along with the processes used for each.\nParticipants will gain an understanding of the surface mount technologies that enable today’s fine pitch products.\nThis course will provide detailed references for participants to study and further deepen their understanding.\n\n\n\nREGISTER HERE
URL:https://semiwiki.com/event/ic-packaging-technology/
LOCATION:Online
ORGANIZER;CN="Semitracks%2C Inc.":MAILTO:info@semitracks.com
END:VEVENT
BEGIN:VEVENT
DTSTART;VALUE=DATE:20260915
DTEND;VALUE=DATE:20260918
DTSTAMP:20251015T145440Z
CREATED:20251009T050205Z
LAST-MODIFIED:20251015T145440Z
UID:362509-1789430400-1789689599@semiwiki.com
SUMMARY:AI Infra Summit 2026
DESCRIPTION:What is the AI Infra Summit?\n\nThe AI Infra Summit is the premier full-stack AI Infrastructure conference\, arranged in a modular way that equally enables both enterprises and technology/solution providers to benefit from domain-specific content\, all while doing business on the exhibition floor. Our 4 track event is divided into Hardware & Systems\, Edge AI Infrastructure\, Enterprise AI\, & Datacenter Infrastructure. \nThe AI Infra Summit takes place Tuesday – Thursday\, 15-17 September 2026. \nRegistration opens at 9am\, Keynotes begin 10am\, Exhibition Hall opens 12:30pm. \nThe event takes place at the Santa Clara Convention Center\, 5001 Great America Pkwy\, Santa Clara\, CA 95054\, United States. \n\nREGISTER HERE
URL:https://semiwiki.com/event/ai-infra-summit-2026/
LOCATION:Santa Clara Convention Center\, Santa Clara Convention Center\, 5001 Great America Pkwy\, Santa Clara\, CA\, United States
ATTACH;FMTTYPE=image/png:https://semiwiki.com/wp-content/uploads/2025/10/Screenshot-2025-10-08-220133.png
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=America/Los_Angeles:20260915T090000
DTEND;TZID=America/Los_Angeles:20260915T100000
DTSTAMP:20260821T064040Z
CREATED:20260821T064040Z
LAST-MODIFIED:20260821T064040Z
UID:372450-1789462800-1789466400@semiwiki.com
SUMMARY:Webinar: Shift Left to Ship Faster: Verifying IP and SoCs at Real Workload Speeds
DESCRIPTION:Featured Speakers: \n\nMadhumita Sanyal\, Sr. Director of Technical Product Management\, Synopsys\nVarun Agrawal\, Director of Product Management\, Synopsys\n\nAs SoC complexity climbs\, traditional verification can’t keep pace — and system-level bugs surface late\, when they’re hardest to fix. By pairing Hardware-Assisted Verification (HAV) with Interface IP like PCIe\, Ethernet\, and DDR\, teams validate earlier and at far higher performance\, catching issues well before tape-out. \nJoin Synopsys experts to see how Interface IP\, VIP\, and HAV work together to accelerate validation and speed silicon bring-up. \nWhat you’ll learn: \n\nHow HAV and Interface IP shift verification left at real workload speeds\nHow to run real software workloads to boost debug productivity and cut integration risk\nHow to keep full coverage across PCIe\, Ethernet\, and other high-speed interfaces\n\nREGISTER HERE
URL:https://semiwiki.com/event/webinar-shift-left-to-ship-faster-verifying-ip-and-socs-at-real-workload-speeds/
LOCATION:Online
ATTACH;FMTTYPE=image/jpeg:https://semiwiki.com/wp-content/uploads/2026/08/Synopsys-Shift-Left-webinar-1200x1200px.jpg
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=America/Los_Angeles:20260915T090000
DTEND;TZID=America/Los_Angeles:20260915T160000
DTSTAMP:20260804T030422Z
CREATED:20260804T030422Z
LAST-MODIFIED:20260804T030422Z
UID:371926-1789462800-1789488000@semiwiki.com
SUMMARY:Advanced Measurements Seminar – Toronto
DESCRIPTION:As RF systems continue to evolve with wider bandwidths and higher frequencies\, engineers are navigating faster plays\, tighter margins\, and more complex signals than ever before. The challenge is no longer capturing signals\, it is turning those measurements into meaningful insights that accelerate design and validation. \nJoin Dr. Joel Dunsmore and fellow Keysight R&D experts for an interactive\, in-person seminar focused on the latest innovations in vector network analysis\, advanced signal generation\, and next-generation signal analysis. Through practical demonstrations\, application-focused sessions\, and expert best practices\, you’ll learn how to skate past signal complexity to score clearer insights. \nStep onto the ice with Keysight experts and explore: \n\nBreaking the 250 GHz Barrier with Keysight’s vector network analyzers\nCreating the Perfect Signal: Advanced signal generation for next-generation RF systems\nPrecision RF Validation for Next-Generation Wi-Fi Systems featuring the new Keysight XA5 Signal Analyzer\nCapturing the Full Signal: Wideband analysis for satellite communications featuring the new Keysight XA6 Signal Analyzer\n\nWhether you’re developing next-generation wireless\, aerospace and defense\, semiconductor\, or other advanced RF systems\, you’ll leave with practical techniques and a deeper understanding of the latest RF measurement technologies to help validate designs with greater speed\, accuracy\, and confidence. \nREGISTER HERE
URL:https://semiwiki.com/event/advanced-measurements-seminar-toronto/
LOCATION:ventureLAB\, ventureLAB\, 3600 Steeles Ave E\, Markham\, Ontario\, L3R 9Z7\, Canada
ATTACH;FMTTYPE=image/png:https://semiwiki.com/wp-content/uploads/2026/08/1783960788-02b4fdb67655a8e0.png
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=America/Los_Angeles:20260915T100000
DTEND;TZID=America/Los_Angeles:20260915T110000
DTSTAMP:20260804T030215Z
CREATED:20260804T030215Z
LAST-MODIFIED:20260804T030215Z
UID:371923-1789466400-1789470000@semiwiki.com
SUMMARY:Webinar: Engineering Optics for Aerospace Imagers: Digital-Twin Workflows from Concept to Validated Systems (Americas Session)
DESCRIPTION:Earth observation systems and aerial drones share optical systems design workflow similarities – from telescope and imager architectures\, stray-light control\, and multi-spectral performance requirements for a variety of applications. \nIn this webinar\, we will share a few of these workflows and approach to those common threads through the optical system requirements and architecture development. \nWe will also touch on changes coming in design relying on compute power\, combined GUI and script-based software operation\, as well as the impact of AI-assisted tools on speeding time to market. \nCome see how Keysight’s Optical Design Engineering tools – including CODE V\, LightTools\, and ImSym – can help streamline your optical systems engineering for earth observation and airborne imagers into a common digital-twin workflow\, from concept to validated system. \nWho Should Attend?\n\nOptical and imaging system engineers\nLens\, telescope\, and imager designers\nSystems engineers developing earth observation or airborne imaging platforms\nEngineers evaluating digital-twin workflows\nTeams interested in AI-assisted optical design and simulation\n\nREGISTER HERE
URL:https://semiwiki.com/event/webinar-engineering-optics-for-aerospace-imagers-digital-twin-workflows-from-concept-to-validated-systems-americas-session/
LOCATION:Online
ATTACH;FMTTYPE=image/png:https://semiwiki.com/wp-content/uploads/2026/08/1784631413-f2a9317b1ed9103c-scaled.png
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=America/Los_Angeles:20260915T100000
DTEND;TZID=America/Los_Angeles:20260915T110000
DTSTAMP:20260817T225647Z
CREATED:20260817T225647Z
LAST-MODIFIED:20260817T225647Z
UID:372326-1789466400-1789470000@semiwiki.com
SUMMARY:Webinar: Agents Assemble: Build Your Chip Design Multi-Agent System in 30 Minutes
DESCRIPTION:MUST USE COMPANY EMAIL TO REGISTER \nA purpose-built multi-agent system for chip design shouldn’t be a quarter-long project. On the Agentrys Studio Platform\, the initial build takes about 30 minutes—plus however much customization your flow and data require. \nIn this hands-on session\, we’ll build a working end-to-end Spec2GDS multi-agent system live using open-source EDA tools\, then customize it for your internal flows\, scripts\, and proprietary data. \nWHAT WE WILL COVER\n– Agent building basics: agents\, skills\, tools\, and workflows\n– Building an end-to-end Spec2GDS multi-agent system with open-source tooling\n– Customizing agents to drive your internal flows and reason over proprietary data\n– Turning ad-hoc coding agent skills into managed\, reproducible\, scalable workflows\n– Automatic evolution: how Agentrys multi-agent systems adapt themselves to new data and new tasks\n– Who should attend: Design\, DV\, PD\, and CAD/methodology engineers and managers evaluating agentic AI for silicon workflows. \nYou’ll leave able to stand up your own specialized multi-agent system in a single sitting—and knowing how it keeps improving after deployment. \nSPEAKER\nDuo Ding is a founding member of Agentrys AI\, where leading industry experts and visionaries are inventing the next frontier of chip design through Agentic Design Automation. Duo brings 20 years of silicon experience\, spanning RTL\, design verification\, physical design\, feasibility PPA\, physical verification\, DTCO and PDK/library optimization for CPU/GPU/SoC. He authored 50+ publications\, ranging from AI in EDA to multi-agent systems. He holds a Ph.D. in Electrical and Computer Engineering from Univ. of Texas at Austin and is the recipient of the 2013 ACM Outstanding Ph.D. Dissertation Award in Electronic Design Automation. \n*This Webinar is in Partnership with SemiWiki and Agentrys* \nREGISTER HERE
URL:https://semiwiki.com/event/webinar-agents-assemble-build-your-chip-design-multi-agent-system-in-30-minutes/
LOCATION:Online
ATTACH;FMTTYPE=image/png:https://semiwiki.com/wp-content/uploads/2026/08/Screenshot-2026-08-17-155559.png
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=America/Los_Angeles:20260915T110000
DTEND;TZID=America/Los_Angeles:20260915T120000
DTSTAMP:20260903T085002Z
CREATED:20260903T085002Z
LAST-MODIFIED:20260903T085002Z
UID:373228-1789470000-1789473600@semiwiki.com
SUMMARY:Webinar: Simulation for Data Center Cooling Infrastructure
DESCRIPTION:AI ready data centers are reshaping cooling infrastructure\, with the industry moving from traditional air cooling toward hybrid and liquid cooling architectures to support higher rack densities and stricter efficiency targets. Join this webinar to explore how simulation supports faster decisions\, reduced risk\, improved uptime\, and future ready cooling infrastructure for high density AI compute growth. \n\n\nOverview\nAI ready data centers are reshaping cooling infrastructure\, with the industry moving from traditional air cooling toward hybrid and liquid cooling architectures to support higher rack densities and stricter efficiency targets. This transition introduces new thermal\, mechanical\, safety\, and operational challenges across room and facility scales. This webinar focuses on simulation possibilities beyond rack level\, with emphasis on room\, plant\, and site infrastructure decisions. \nAt room level\, attendees will see what is possible with 3D airflow and thermal analysis to evaluate temperature distribution\, hotspot risk\, and operational robustness. As cooling architectures evolve\, the session will showcase how simulation can assess air based and liquid cooling configurations. Beyond the room\, the webinar highlights analysis possibilities for critical cooling infrastructure equipment\, including heat exchangers\, pumps\, and related balance of plant systems. It also covers structural assessment possibilities for racks and cooling equipment under operating and handling conditions. \nFrom a safety and operations perspective\, the session includes leakage scenarios\, smoke propagation studies\, and acoustic and environmental evaluations. At system and facility scale\, attendees will see how simulation can represent liquid cooling loops and integrated facility behavior\, including CDU based architectures\, to evaluate performance\, resilience\, and expansion readiness before deployment. The webinar will also highlight how OMNIVERSE connected workflows\, DSX collaboration environments\, and SimReady assets can accelerate digital twin adoption\, improve cross team alignment\, and support faster scenario evaluation for data center cooling programs. \n\n\n\n\nWhat Attendees Will Learn\n\nThe full range of room to facility cooling analyses possible for modern data centers\nWhat airflow\, thermal distribution\, and hotspot risk studies can reveal at room scale\nWhat infrastructure performance assessments can cover across heat exchangers\, cooling towers\, pumps\, and supporting systems\nHow structural\, acoustic\, and environmental analyses can strengthen robust and compliant designs\nHow safety scenarios such as leakage events and smoke propagation can be evaluated virtually\nHow system and facility level simulations can inform capacity planning\, resilience\, and operational readiness\nHow OMNIVERSE\, DSX\, and SimReady assets can help scale digital twin workflows\, improve stakeholder communication\, and speed up design to operations decision cycles\n\n\n\n\n\nWho Should Attend\n\nThermal\, CFD\, and structural analysts\, to connect room level insights with facility level decision making\nData center facility engineers and architects\, to evaluate and scale cooling infrastructure beyond rack level\nCooling infrastructure OEM engineering teams\, to assess equipment and system behavior before deployment\nData center operations and reliability teams\, to improve uptime\, safety planning\, and risk reduction\nEngineering consultants and EPC partners\, to support customer programs with faster and stronger technical decision support\n\n\n\n\n\nSpeaker\n\nSreenivas Viyyuri – Applications Engineering Principal Engineer\, Ansys part of Synopsys\n\n\n\n\n\nREGISTER HERE
URL:https://semiwiki.com/event/webinar-simulation-for-data-center-cooling-infrastructure/
LOCATION:Online
END:VEVENT
END:VCALENDAR