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DTSTART;VALUE=DATE:20260908
DTEND;VALUE=DATE:20260912
DTSTAMP:20260616T210718Z
CREATED:20260616T210718Z
LAST-MODIFIED:20260616T210718Z
UID:370385-1788825600-1789171199@semiwiki.com
SUMMARY:SPIE Photomask Technology + Extreme Ultraviolet Lithography
DESCRIPTION:Join your colleagues in Monterey for the premier worldwide photomask conference \n\nWe invite you to explore the latest advances and breakthroughs at this annual conference in Monterey\, California. Connect with leading scientists and engineers and discover new work across photomasks\, patterning\, metrology\, materials\, inspection and repair\, mask business\, extreme ultraviolet lithography\, and emerging technologies. \nConnect with top suppliers at the free two-day exhbition \nDiscuss your product requirements with top suppliers showcasing the newest products and innovations \nIndustry partners will be there to help solve problems\, cut costs\, and increase capabilities. \n\nREGISTER HERE
URL:https://semiwiki.com/event/spie-photomask-technology-extreme-ultraviolet-lithography/
LOCATION:Monterey\, CA\, Monterey\, CA\, United States
ATTACH;FMTTYPE=image/png:https://semiwiki.com/wp-content/uploads/2026/06/Screenshot-2026-06-16-140652.png
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BEGIN:VEVENT
DTSTART;VALUE=DATE:20260908
DTEND;VALUE=DATE:20260912
DTSTAMP:20260903T065917Z
CREATED:20260903T065917Z
LAST-MODIFIED:20260903T065917Z
UID:373086-1788825600-1789171199@semiwiki.com
SUMMARY:SPIE Photomask Technology + Extreme Ultraviolet Lithography 2026
DESCRIPTION:Join your colleagues in Monterey for the premier worldwide photomask conference \n\nWe invite you to explore the latest advances and breakthroughs at this annual conference in Monterey\, California. Connect with leading scientists and engineers and discover new work across photomasks\, patterning\, metrology\, materials\, inspection and repair\, mask business\, extreme ultraviolet lithography\, and emerging technologies. \nConnect with top suppliers at the free two-day exhbition \nDiscuss your product requirements with top suppliers showcasing the newest products and innovations \nIndustry partners will be there to help solve problems\, cut costs\, and increase capabilities. \nConferences: 8–11 September 2026 | Exhibition: 9–10 September 2026 | Courses: 9 September 2026 \n\nREGISTER HERE
URL:https://semiwiki.com/event/spie-photomask-technology-extreme-ultraviolet-lithography-2026/
LOCATION:Monterey\, CA\, Monterey\, CA\, United States
ATTACH;FMTTYPE=image/png:https://semiwiki.com/wp-content/uploads/2026/09/Screenshot-2026-09-02-235846.png
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BEGIN:VEVENT
DTSTART;VALUE=DATE:20260909
DTEND;VALUE=DATE:20260911
DTSTAMP:20260904T083857Z
CREATED:20260904T083857Z
LAST-MODIFIED:20260904T083857Z
UID:373293-1788912000-1789084799@semiwiki.com
SUMMARY:Webinar: Introducing Ansys TPT\, Embedded Software Testing
DESCRIPTION:Discover how to transform your embedded software testing with Ansys TPT\, reducing cost\, improving quality\, and accelerating validation across all test levels. You’ll also explore how TPT\, combined with SCADE\, enables a seamless\, scalable design-to-test workflow for modern\, safety-critical systems. \n\n\n\n\nDate/Time: \nSession 1:\nSeptember 9\, 2026\n9 AM CET | 4 PM KST \nSession 2:\nSeptember 10\, 2026\n6 PM CET | 9 AM PST | 12 PM EST \n\n\nOverview\nEmbedded software testing is becoming increasingly complex\, costly\, and difficult to scale. As systems evolve and safety standards tighten\, traditional approaches struggle to keep pace\, leading to high maintenance effort\, fragmented tool chains\, and delayed feedback that slows development. \nIn this webinar\, discover Ansys TPT\, a next-generation test automation solution designed to accelerate embedded software validation. TPT supports the full testing lifecycle\, from model-in-the-loop (MiL) and software-in-the-loop (SiL) to system-level validation\, enabling teams to test models\, code\, and integrated systems in a unified environment. \nYou will learn how TPT reduces testing time through automation\, reusability\, and a unique architecture that minimizes maintenance overhead\, helping teams iterate faster and move validation earlier in the cycle. \nThe session will also highlight the combined value of TPT and SCADE. Requirement-based testing and the separation of stimuli and expected behavior enable rapid\, scalable test design\, while integrated workflows accelerate validation without compromising traceability and coverage. \nBy combining automation\, advanced test design\, and seamless integration\, TPT empowers engineering teams to deliver software faster\, turning testing into a driver of development speed and time-to-market. \nAutomatic traceability and test result reporting support functional safety standards such as ISO 26262 by ensuring end-to-end traceability between safety requirements\, test cases\, and test outcomes\, enabling complete verification coverage\, audit readiness\, and improved functional safety. \n\n\n\n\nWhat Attendees Will Learn\n\nHow to reduce testing cost and effort with scalable automation\nHow to unify testing across MiL\, SiL\, HiL\, and system levels\nHow to improve test coverage\, reuse\, and productivity\nWhy TPT + SCADE enables a seamless design-to-test workflow\nHow to enhance traceability and compliance for safety-critical systems\n\n\n\n\n\nWho Should Attend\n\nTest Engineers / Validation Engineers\nTest Managers / Heads of Testing Departments\nEmbedded Software Engineers / Developers\nSystem Engineers working with model-based design\nEngineering IT / Toolchain & CI/CD Specialists\nProject Managers overseeing software validation\nSCADE users and model-based design practitioners\nTeams involved in safety-critical software (automotive\, aerospace\, industrial)\n\n\n\n\n\nSpeakers\n\nNeeraja Vemulapalli – Product Management\, Director\, Synopsys\nStefan Lachmann – Technical Product Management\, Sr Staff Engineer\, Synopsys\nFrançoix-Xavier Dormoy – Product Management\, Sr Staff\, Synopsys\n\n\n\n\n\nREGISTER HERE
URL:https://semiwiki.com/event/webinar-introducing-ansys-tpt-embedded-software-testing/
LOCATION:Online
ATTACH;FMTTYPE=image/webp:https://semiwiki.com/wp-content/uploads/2026/09/tpt-featured-image.webp
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BEGIN:VEVENT
DTSTART;VALUE=DATE:20260910
DTEND;VALUE=DATE:20260911
DTSTAMP:20260903T084847Z
CREATED:20260903T084847Z
LAST-MODIFIED:20260903T084847Z
UID:373226-1788998400-1789084799@semiwiki.com
SUMMARY:CadenceTECHTALK: Water Wading Simulations and One-Way FSI with the SPH Solver
DESCRIPTION:Join the second session of our three-part transmission simulation series to explore GPU-accelerated SPH water wading simulations using the ANSA SPH solver from Cadence. Learn how to evaluate pressure forces on vehicle components and couple SPH results with a structural solver to perform efficient one-way FSI analysis for automotive and other engineering applications. \nREGISTER HERE
URL:https://semiwiki.com/event/cadencetechtalk-water-wading-simulations-and-one-way-fsi-with-the-sph-solver/
LOCATION:Online
END:VEVENT
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DTSTART;TZID=America/Los_Angeles:20260910T090000
DTEND;TZID=America/Los_Angeles:20260910T100000
DTSTAMP:20260804T022709Z
CREATED:20260804T022709Z
LAST-MODIFIED:20260804T022709Z
UID:371882-1789030800-1789034400@semiwiki.com
SUMMARY:ESD Alliance Webinar: Gen-AI for Chip Design and Security
DESCRIPTION:This webinar will present a multi-agent intelligent assistant system architected to automate and augment SoC design and security verification. \nDesigning functionally correct\, high-performance\, and provably secure system-on-chips (SoCs) has become a strategic imperative for modern computing infrastructure. Yet traditional design and verification methodologies are increasingly strained by escalating complexity\, massive design scales\, heterogeneous integration\, and rapidly evolving security threats. Ensuring correctness\, scalability\, comprehensiveness\, and adaptability across the full SoC lifecycle now exceeds the practical limits of conventional toolchains and human-centric workflows. \nThe emergence of large language models (LLMs) introduces a transformative opportunity for SoC design automation. Beyond natural language understanding and code generation\, advanced LLMs demonstrate capabilities in architectural reasoning\, specification refinement\, vulnerability analysis\, and design-space exploration. However\, monolithic models alone are insufficient for the multidisciplinary and iterative nature of chip design. An agentic paradigm—where specialized LLM-driven agents collaborate within a coordinated framework—enables modular reasoning\, cross-layer verification\, security validation\, and adaptive decision-making throughout the design process. \nThis talk will present a multi-agent intelligent assistant system architected to automate and augment SoC design and security verification. The framework integrates design synthesis\, threat modeling\, formal reasoning\, runtime monitoring strategies\, and hardware–software co-verification into a cohesive workflow. Looking ahead\, such agentic systems point toward a future of self-optimizing\, security-aware\, and continuously verified silicon—where AI-driven design environments not only accelerate innovation but also fundamentally redefine how we conceive\, build\, and trust next-generation microelectronic systems. \nREGISTER HERE
URL:https://semiwiki.com/event/esd-alliance-webinar-gen-ai-for-chip-design-and-security/
LOCATION:Online
ATTACH;FMTTYPE=image/webp:https://semiwiki.com/wp-content/uploads/2026/08/Savage-on-Security-3-360_0.jpg.webp
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DTSTART;TZID=America/Los_Angeles:20260910T090000
DTEND;TZID=America/Los_Angeles:20260910T100000
DTSTAMP:20260903T084746Z
CREATED:20260903T084746Z
LAST-MODIFIED:20260903T084746Z
UID:373223-1789030800-1789034400@semiwiki.com
SUMMARY:ESD Alliance Webinar: Gen-AI for Chip Design and Security
DESCRIPTION:This webinar will present a multi-agent intelligent assistant system architected to automate and augment SoC design and security verification. \nDesigning functionally correct\, high-performance\, and provably secure system-on-chips (SoCs) has become a strategic imperative for modern computing infrastructure. Yet traditional design and verification methodologies are increasingly strained by escalating complexity\, massive design scales\, heterogeneous integration\, and rapidly evolving security threats. Ensuring correctness\, scalability\, comprehensiveness\, and adaptability across the full SoC lifecycle now exceeds the practical limits of conventional toolchains and human-centric workflows. \nThe emergence of large language models (LLMs) introduces a transformative opportunity for SoC design automation. Beyond natural language understanding and code generation\, advanced LLMs demonstrate capabilities in architectural reasoning\, specification refinement\, vulnerability analysis\, and design-space exploration. However\, monolithic models alone are insufficient for the multidisciplinary and iterative nature of chip design. An agentic paradigm—where specialized LLM-driven agents collaborate within a coordinated framework—enables modular reasoning\, cross-layer verification\, security validation\, and adaptive decision-making throughout the design process. \nThis talk will present a multi-agent intelligent assistant system architected to automate and augment SoC design and security verification. The framework integrates design synthesis\, threat modeling\, formal reasoning\, runtime monitoring strategies\, and hardware–software co-verification into a cohesive workflow. Looking ahead\, such agentic systems point toward a future of self-optimizing\, security-aware\, and continuously verified silicon—where AI-driven design environments not only accelerate innovation but also fundamentally redefine how we conceive\, build\, and trust next-generation microelectronic systems. \nREGISTER HERE
URL:https://semiwiki.com/event/esd-alliance-webinar-gen-ai-for-chip-design-and-security-2/
LOCATION:Online
ATTACH;FMTTYPE=image/webp:https://semiwiki.com/wp-content/uploads/2026/09/Savage-on-Security-3-360_0.jpg.webp
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BEGIN:VEVENT
DTSTART;TZID=America/Los_Angeles:20260910T110000
DTEND;TZID=America/Los_Angeles:20260910T120000
DTSTAMP:20260903T084554Z
CREATED:20260903T084554Z
LAST-MODIFIED:20260903T084554Z
UID:373221-1789038000-1789041600@semiwiki.com
SUMMARY:Webinar: Deploy and Scale Your Simulation in the Cloud with Ansys\, part of Synopsys\, and AWS
DESCRIPTION:Learn how Ansys\, part of Synopsys\, and AWS enable engineering teams to deploy and scale simulation workloads in the cloud. Discover how cloud solutions such as Ansys Cloud Burst Compute deliver faster results\, greater flexibility\, and on-demand access to powerful compute resources. \n\n\nOverview\nLearn how Ansys\, part of Synopsys\, and AWS enable engineering teams to deploy and scale simulation workloads in the cloud. Discover how cloud solutions such as Ansys Cloud Burst Compute deliver faster results\, greater flexibility\, and on-demand access to powerful compute resources. \n\n\n\n\nWhat Attendees Will Learn\n\nHow Ansys Cloud Burst Compute works with AWS to burst simulation jobs on demand.\nReal-world performance gains: faster solve times and reduced queue wait.\nHow to get started without re-architecting existing Ansys workflows.\n\n\n\n\n\nWho Should Attend\nEngineering simulation analysts + managers and IT administrators + managers interested in accelerating their simulations \n\n\n\n\nSpeakers\n\nMadhu Vellakal\nDr John Baker\n\n\n\nREGISTER HERE
URL:https://semiwiki.com/event/webinar-deploy-and-scale-your-simulation-in-the-cloud-with-ansys-part-of-synopsys-and-aws/
LOCATION:Online
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