BEGIN:VCALENDAR
VERSION:2.0
PRODID:-//SemiWiki - ECPv6.16.3//NONSGML v1.0//EN
CALSCALE:GREGORIAN
METHOD:PUBLISH
X-WR-CALNAME:SemiWiki
X-ORIGINAL-URL:https://semiwiki.com
X-WR-CALDESC:Events for SemiWiki
REFRESH-INTERVAL;VALUE=DURATION:PT1H
X-Robots-Tag:noindex
X-PUBLISHED-TTL:PT1H
BEGIN:VTIMEZONE
TZID:America/Los_Angeles
BEGIN:DAYLIGHT
TZOFFSETFROM:-0800
TZOFFSETTO:-0700
TZNAME:PDT
DTSTART:20250309T100000
END:DAYLIGHT
BEGIN:STANDARD
TZOFFSETFROM:-0700
TZOFFSETTO:-0800
TZNAME:PST
DTSTART:20251102T090000
END:STANDARD
BEGIN:DAYLIGHT
TZOFFSETFROM:-0800
TZOFFSETTO:-0700
TZNAME:PDT
DTSTART:20260308T100000
END:DAYLIGHT
BEGIN:STANDARD
TZOFFSETFROM:-0700
TZOFFSETTO:-0800
TZNAME:PST
DTSTART:20261101T090000
END:STANDARD
BEGIN:DAYLIGHT
TZOFFSETFROM:-0800
TZOFFSETTO:-0700
TZNAME:PDT
DTSTART:20270314T100000
END:DAYLIGHT
BEGIN:STANDARD
TZOFFSETFROM:-0700
TZOFFSETTO:-0800
TZNAME:PST
DTSTART:20271107T090000
END:STANDARD
END:VTIMEZONE
BEGIN:VEVENT
DTSTART;VALUE=DATE:20260622
DTEND;VALUE=DATE:20260627
DTSTAMP:20260624T132602
CREATED:20251211T213919Z
LAST-MODIFIED:20251211T213919Z
UID:364634-1782086400-1782518399@semiwiki.com
SUMMARY:ISC 2026
DESCRIPTION:CONFERENCE & EXHIBITION\n\n\n\n\n\n\n\n\nHPC\, AI\, Quantum: Powering Innovation and Sustainability \n\n\n\n\nISC 2026 connects scientists\, engineers\, and technology leaders to explore the future of high performance computing. We will examine today’s breakthroughs in artificial intelligence\, high performance computing and quantum technologies\, as well as what lies ahead. \nAdditionally\, we are committed to sustainability by promoting energy-efficient and cost-effective computing\, while empowering the next-generation workforce to continue the community’s legacy of innovation. \nISC 2026 will bring together a mix of people from different backgrounds and areas of expertise to drive HPC. Whether you are just entering the field\, in a mid-level position\, a part of senior management\, or a student\, we welcome you to join our efforts to connect people and technologies. \n\n\n\n\nREGISTER HERE
URL:https://semiwiki.com/event/isc-2026/
LOCATION:Hamburg\, Germany\, Hamburg\, Germany
ATTACH;FMTTYPE=image/png:https://semiwiki.com/wp-content/uploads/2025/12/Screenshot-2025-12-11-133841.png
END:VEVENT
BEGIN:VEVENT
DTSTART;VALUE=DATE:20260623
DTEND;VALUE=DATE:20260626
DTSTAMP:20260624T132602
CREATED:20260414T063431Z
LAST-MODIFIED:20260414T063431Z
UID:368412-1782172800-1782431999@semiwiki.com
SUMMARY:LID World Summit 2026
DESCRIPTION:CEA-Leti’s flagship event\n\n\n\n\nDiscover sustainable semiconductor breakthroughs to guide your roadmap from lab-to-market and to tomorrow’s AI factory at LID World Summit 2026. \nJoin industry leaders to discover groundbreaking innovation that will help meet technological goals for the healthcare\, automotive\, industrial\, defense\, and consumer-electronics sectors. Leave with confidence in the possible. \n\n\nREGISTER HERE
URL:https://semiwiki.com/event/lid-world-summit-2026/
LOCATION:Grenoble\, France
ATTACH;FMTTYPE=image/png:https://semiwiki.com/wp-content/uploads/2026/04/Screenshot-2026-04-13-233332.png
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=America/Los_Angeles:20260625T090000
DTEND;TZID=America/Los_Angeles:20260625T100000
DTSTAMP:20260624T132602
CREATED:20260602T201039Z
LAST-MODIFIED:20260604T000532Z
UID:369891-1782378000-1782381600@semiwiki.com
SUMMARY:Webinar: Intel: Pushing EMIB Forward Design Methodology Insights with Synopsys Tools - SemiWiki
DESCRIPTION:Date: Jun 25\, 2026 | 9:00 AM PST \n\n\nIn this webinar\, Intel will present how EMIB (Embedded Multi‑die Interconnect Bridge) enables compact\, cost-effective multi‑die design while sustaining the bandwidth and power efficiency required for AI and datacenter designs. Intel will share an EMIB reference methodology built on Synopsys 3DIC Compiler platform that spans early planning through signoff. The webinar highlights how early bump planning\, automated die-to‑die routing for HBM and UCIe\, and a unified exploration‑to-signoff data model help Intel manage system‑level co-design complexity while maintaining closure on timing\, power\, thermal\, and SIPI. Intel will also discuss SIPI methodology using Synopsys Tools and EMIB’s ability to support dense\, high‑speed HBM interfaces. \nWhat you’ll learn \n\nHow EMIB addresses key multi-die design challenges\nWhy early bump planning is critical for EMIB success\nHow automated die-to-die routing accelerates convergence\nHow a unified flow supports scalable timing\, power\, thermal\, and SIPI signoff\nHow EMIB enables high-speed HBM integration with confidence\n\n\n\n\n\nFeatured Speaker\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\nSadha Parasuraman \nDesign Methodology Architect and EDA Enablement Manager\, Intel\n \nSadha Parasuraman is an EDA Enablement Manager and Design Methodology Architect for advanced design and customer enablement at Intel Foundry. Sadha’s Extensive experience in design flows and methodology stacks across semiconductor technologies. \n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\nREGISTER HERE
URL:https://semiwiki.com/event/webinar-intel-pushing-emib-forward-design-methodology-insights-with-synopsys-tools/
LOCATION:Online
ATTACH;FMTTYPE=image/jpeg:https://semiwiki.com/wp-content/uploads/2026/06/synopsys-intel-linkedin-update-1200x1200-v3.jpg
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=America/Los_Angeles:20260625T090000
DTEND;TZID=America/Los_Angeles:20260625T163000
DTSTAMP:20260624T132602
CREATED:20260429T075058Z
LAST-MODIFIED:20260429T075058Z
UID:368934-1782378000-1782405000@semiwiki.com
SUMMARY:TSMC 2026 China Technology Symposium
DESCRIPTION:Join us to get the latest on:\n\nTSMC’s industry-leading HPC\, Smartphones\, IoT\, and Automotive platform solutions\nTSMC’s advanced logic technology progress on 3nm\, 2nm\, A16\, A14 processes and beyond\nTSMC 3DFabric® advanced silicon stacking and packaging technology advancement on TSMC-SoIC®\, InFO\, CoWoS®\, and TSMC-SoW™\nTSMC’s specialty technology breakthroughs on ultra-low power\, RF\, embedded memory\, power management\, sensor technologies\, and more\nTSMC’s manufacturing excellence\, capacity expansion plans\, and green manufacturing achievements\nTSMC’s Open Innovation Platform® Ecosystem to speed up time-to-design\n\nFor more information on the TSMC Technology Symposium\, e-mail us at: symposium@tsmc.com. \nWe look forward to seeing you at the TSMC 2026 Technology Symposium! \nREGISTER HERE
URL:https://semiwiki.com/event/tsmc-2026-china-technology-symposium/
LOCATION:Shanghai International Convention Center (SHICC)\, No.2727\, Riverside Avenue\, Pudong\, Shanghai\, 200120\, China
ATTACH;FMTTYPE=image/png:https://semiwiki.com/wp-content/uploads/2026/04/Screenshot-2026-04-29-005004.png
END:VEVENT
BEGIN:VEVENT
DTSTART;TZID=America/Los_Angeles:20260625T100000
DTEND;TZID=America/Los_Angeles:20260625T110000
DTSTAMP:20260624T132602
CREATED:20260528T213005Z
LAST-MODIFIED:20260528T213005Z
UID:369744-1782381600-1782385200@semiwiki.com
SUMMARY:Webinar: How Manufacturing Complexity Increased\, and Why Validation Had to Evolve
DESCRIPTION:About this event\nEngineering at the Edge Webinar Series – Episode 4 \nAs semiconductor complexity increases and board designs become denser\, manufacturing teams face tighter tolerances\, reduced test access\, and rising pressure to maintain yield and throughput. Validating RF performance and high-speed digital signal integrity at production scale adds a new layer of complexity that traditional approaches struggle to address. \nJoin Jason Kary\, Senior Vice President and President of Keysight’s ElectronicIndustrial Solutions Group\, to explore how manufacturing validation is evolving. You’ll learn how wafer-level and in-circuit test strategies improve coverage\, detect defects earlier\, and enable consistent\, high-volume production at scale without compromising quality. \n\n\n\n\n\n\nWho should attend this event?\nSemiconductor and electronics manufacturing engineers should attend. This session fits teams focused on test coverage\, yield improvement\, and high-volume production validation. \n\n\n\nREGISTER HERE
URL:https://semiwiki.com/event/webinar-how-manufacturing-complexity-increased-and-why-validation-had-to-evolve-2/
LOCATION:Online
ATTACH;FMTTYPE=image/png:https://semiwiki.com/wp-content/uploads/2026/05/Screenshot-2026-05-28-142402.png
END:VEVENT
END:VCALENDAR