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DTSTART;VALUE=DATE:20260419
DTEND;VALUE=DATE:20260424
DTSTAMP:20260418T195717
CREATED:20260107T100748Z
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SUMMARY:2026 IEEE Custom Integrated Circuits Conference (CICC)
DESCRIPTION:Join us for CICC 2026\, the world’s premier conference devoted to IC development. \n\n\n\n\n\n\nApril 19 – 22\, 2026 Seattle\, WA\, USA \n\n\n\n\n\n\nApril 22 – 23\, 2026 – CHISIC Workshop \nAbout CICC\n\n\nThe IEEE Custom Integrated Circuits Conference is a premier conference devoted to IC development. The conference program is a blend of oral presentations\, exhibits\, panels and forums. The conference sessions present original first published technical work and innovative circuit techniques that tackle practical problems. CICC is the conference to find out how to solve design problems\, improve circuit design techniques\, get exposure to new technology areas\, and network with peers\, authors and industry experts. \nThere are 3 days of Technical Sessions that include lecture presentations addressing state of the art developments in integrated circuit design. The Educational Sessions are a full day of tutorials instructed by recognized invited speakers. The Panels\, and Forums are presented throughout the conference to enrich the learning experience of the attendees. The Panel Discussions and Forums are presented by leaders from the IC industry. CICC includes an Exhibits Hall that is open in the evenings where Semiconductor manufacturers\, software tool suppliers\, silicon IP providers\, design-service houses\, and technical book publishers offer displays and demonstrations of their products. CICC is sponsored by the IEEE Solid-State Circuits Society and technically co-sponsored by the IEEE Circuits and Systems Society. \n\n\n\n\n\nREGISTER HERE
URL:https://semiwiki.com/event/2026-ieee-custom-integrated-circuits-conference-cicc/
LOCATION:Seattle\, Washington\, Seattle\, WA\, United States
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DTSTART;VALUE=DATE:20260420
DTEND;VALUE=DATE:20260424
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SUMMARY:Semiconductor Reliability and Product Qualification
DESCRIPTION:Product reliability and qualification continues to evolve with the electronics industry. New electronics applications require new approaches to reliability and qualification. In the past\, reliability meant discovering\, characterizing and modeling failure mechanisms\, and determining their impact on the reliability of the circuit. Today\, reliability can involve tradeoffs between performance and reliability; assessing the impact of new materials; dealing with limited margins\, and other factors. This requires information on subjects like: statistics\, testing\, technology\, processing\, materials science\, chemistry\, and customer expectations. While customers expect high reliability levels\, incorrect testing\, calculations\, and qualification procedures can severely impact reliability. Semiconductor Reliability and Product Qualification is a 4-day course that offers detailed instruction on a variety of subjects pertaining to semiconductor reliability and qualification. This course is designed for every manager\, engineer\, and technician concerned with reliability in the semiconductor field\, qualifying semiconductor components\, or supplying tools to the industry. \nWhat Will I Learn By Taking This Class?\nParticipants will learn to develop the skills to determine what failure mechanisms might occur\, and how to test for them\, develop models for them\, and eliminate them from the product. This skill building series is divided into four segments: \n\nOverview of Reliability and Statistics. Participants will learn the fundamentals of statistics\, sample sizes\, distributions and their parameters.\nFailure Mechanisms. Participants will learn the nature and manifestation of a variety of failure mechanisms that can occur both at the die and at the package level. These include: time-dependent dielectric breakdown\, hot carrier degradation\, electromigration\, stress-induced voiding\, moisture\, corrosion\, contamination\, thermomechanical effects\, interfacial fatigue\, and others.\nQualification Principles. Participants will learn how test structures can be designed to help test for a particular failure mechanism.\nTest Strategies. Participants will learn about the JEDEC test standards\, how to design screening tests\, and how to perform burn-in testing effectively.\n\nCourse Objectives\n\nThis course will provide participants with an in-depth understanding of the failure mechanisms\, test structures\, equipment\, and testing methods used to achieve today’s high reliability components.\nParticipants will be able to gather data\, determine how best to plot the data and make inferences from that data.\nThis course will identify the major failure mechanisms\, explain how they are observed\, how they are modeled\, and how they are eliminated.\nThis course will offer a variety of video demonstrations of analysis techniques\, so the participants can get an understanding of the types of results they might expect to see with their equipment.\nParticipants will be able to identify the steps and create a basic qualification process for semiconductor devices.\nParticipants will be able to knowledgeably implement screens that are appropriate to assure the reliability of a component.\nParticipants will be able to identify appropriate tools to purchase when starting or expanding a laboratory.\n\nREGISTER HERE
URL:https://semiwiki.com/event/semiconductor-reliability-and-product-qualification/
LOCATION:San Jose\, CA
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ORGANIZER;CN="Semitracks%2C Inc.":MAILTO:info@semitracks.com
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