All Day

“CAPTURE THE BUG”- A Design Verification Hackathon

Debugging takes up a major chunk of time in an ASIC Designer’s design turnaround time. In a time-intensive environment and complexity of designs incrementing multi-fold day-by-day, debugging is not just a trivial task, but is an integral skill in the domain of design verification.

The verification challenge helps to understand the verification intent to detect bugs in designs, understand debugging and fix the buggy designs. It provides practical exposure to real-world design verification activities

IEEE EMC+SIPI 2022

Spokane, Washington Spokane

2022 IEEE INTERNATIONAL SYMPOSIUM ON ELECTROMAGNETIC COMPATIBILITY, SIGNAL & POWER INTEGRITY WELCOME FROM THE EMC+SIPI 2022 GENERAL CHAIR HELLO ALL, On behalf of the IEEE EMC Society, I invite you …