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Webinar: Should I Kill My Formal Run – Part 2: What You Can Do Beforehand to Avoid Trouble and Set Yourself Up for Success

September 24 @ 8:00 am - 9:00 am

Mentor - A Siemens Business

Overview

In this segment we assume you are about to kick off a formal analysis, and want to make sure you will avoid the most obvious pitfalls in setting up your formal testbench, the DUT, and the runner scripting.

What You Will Learn

  • How you can setup your formal testbench for success by writing assertions, constraints, and cover properties in a “formal friendly” coding style
  • What types of logic in your DUT will likely lead to trouble (in particular, deep state space creators like counters and RAMs), and how to effectively handle them via non-destructive black boxing or remodeling
  • How to setup the run-time multicore configuration and formal engine specifications to best leverage your available compute resources

Who Should Attend

Design Verification Engineers and Managers