WEBINAR: Embedded FPGA: The Fabric for Optimized Machine Learning

Emergence of embedded FPGAs (eFPGAs) within an SoC enables a wide variety of deployment models. With eFPGA, machine learning (ML) can be integrated within new form-factors (mobile edge compute, IoT aggregation and SmartNIC). In this webinar, we demonstrate how you can optimize an eFPGA design in your ASIC or SoC for ML applications.

WHAT YOU WILL LEARN
You will learn how interfacing, routing, memory hierarchy and computation can be tuned to the requirements of the application, network and even a specific layer. You will also learn how re-programmable hardware extends across computation, routing and memory hierarchy; and how to exploit data/weight persistence and sparse matrices to minimize data movement and calculations. We’ll also show benchmarks in standard FPGA and embedded FPGA and examples of how to reduce logic utilization by as much as 50%.

REGISTRATION

ABOUT THE PRESENTER

Dr. Mike Fitton is senior director, strategy and planning at Achronix. He has 25+ years of experience in the signal processing domain, including system architecture, algorithm development, and semiconductors across wireless operators, network infrastructure and most recently in machine learning.