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Webinar: Advanced Methodologies to Accelerate Your Custom Layout
June 10, 2020 @ 11:00 AM - 12:00 PM
Overview
The custom layout process is a critical aspect of achieving your analog design goals in terms of performance, die area, and tapeout date.
The massive challenges of nanometer layout have led to significant innovation in EDA tools and associated methodologies. Many of these approaches are also very useful at mature nodes (130nm – 28nm). They bring benefits such as reduction in die cost, reduction impact of parasitics, and a faster and more predictable custom layout experience.
Join the webinar to learn how to:
- Enhance layout planning to optimize area and reduce congestion
- Block floorplanning which can be independent of its schematic hierarchy
- Enhance pin optimization and congestion analysis
- Automate placement and routing to shorten layout turnaround time
Date and Time
Wednesday, June 10, 2020
11:00AM (PDT), 2:00PM (EDT)
Please Note:
Registration closes at 6:00PM (PDT) on Tuesday June 9, 2020 .
TSMC’s First US Fab