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Visualizer and Optimizing Questa Performance
September 25, 2019
Register For This Web Seminar
Hosted by Oasis Sales and Trilogic, Inc.
Overview
Performance: Every engineer wants more. In this seminar we will look at using Questa vopt flow to gain raw simulator performance. We will also look at how Questa Visualizer brings performance through debug efficiency. Finally we will see how working together, these tools can give maximum simulation performance while maintaining full debug capabilities.
What You Will Learn
Performance:
- Basics of vopt
- Factors that affect performance (acc, coverage)
- 2-step flow vs. 3-step flow
Maximizing Debug productivity with Visualizer Debug Environment:
- A more efficient debugger
- Handles large datasets without bogging down
- Advanced time cone analysis
ABOUT THE PRESENTER
Walter GudeWalter has over 25 years of experience in ASIC/FPGA design and holds a MS in Electrical Engineering from Washington University in St. Louis. He worked for 6 years doing ASIC design at Tellabs Operations. From there, he went to work for Mentor Consulting where he consulted on various ASIC projects including time spent in Munich Germany and Helsinki Finland. For the last decade, Walter has worked as an Application Engineer supporting Mentor’s line of Functional Verification Projects.
Who Should Attend
- Design Engineers
- Verification Engineers
- Engineering Managers
Gordon Moore’s legacy will live on through new paths & incarnations