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Technology Day: Adopting Effective Power Analysis Strategies from System to Silicon

June 25 @ 10:00 AM - 11:00 AM

Overview

Power analysis is critical throughout the lifecycle of a program. Effective power analysis requires different strategies and tools depending on where you are in that lifecycle. In this webinar, we will cover the Cadence® solutions for power analysis starting with early system-level analysis, through RTL-level architecture/ microarchitecture, and finally to silicon signoff. Cadence tools covered include Palladium® Dynamic Power Analysis, Joules™ RTL Power Estimation Solution, and Voltus™ Power Integrity Solution.

Agenda

· System to silicon introduction – Power analysis and exploration

· Systems-level power analysis – Palladium DPA

· RTL power efficiency exploration and optimization – Joules RTL Power Solution

· Power integrity and silicon signoff – Voltus Power Integrity Solution

· Panel Q&A

Start Time

10:00am PDT / 1:00pm EDT