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S3S (SOI-3D-subthreshold) Conference

October 14 - October 17

$330 – $800

IEEE SOI-3D-SUBTHRESHOLD MICROELECTRONICS TECHNOLOGY UNIFIED CONFERENCE

DoubleTree by Hilton
San Jose, CA

October 14th thru 17th, 2019

Our conference has grown over the past several decades to deliver a wealth of important information on the most relevant and state-of-the-art technology topics including 3D Integration, Ultra Low Power Circuits and Devices, and Silicon on Insulator Technology.

Recently the IEEE S3S Conference has been a hot spot for the latest research on 3D Integration to enable another dimension of scaling. Even more recently, the conference has been a place where the newest results on Ultra-Low Power Circuits are discussed and shared.

This year we are happy to announce that the Berkeley Symposium on Energy Efficient Electronic Systems (E3S) will be merging into our conference. Since 2009, the E3S and has been bringing together researchers from academia and industry working on low-energy information processing systems.

The IEEE S3S Conference is not only a venue where the industry and academia publish their latest works but also a place where colleagues come together to have meaningful informal discussions.

We also have instructional short courses and tutorials on the most exciting and new technology topics. This year you can sign up for the Tuesday Tutorial on RF Design and the Thursday Short Course on FD-SOI Design.

Details

Start:
October 14
End:
October 17
Cost:
$330 – $800
Event Categories:
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Website:
http://s3sconference.org/

Organizer

IEEE

Venue

DoubleTree by Hilton in San Jose
San Jose, CA United States + Google Map