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Portable Stimulus Standards and Domain Specific Language – free, online Presentation & Demo

April 28, 2023 @ 8:00 AM - 9:00 AM

From the United States to Japan, the word is out that to avoid multi spins functional simulation is not enough, especially to integrate Test Bench from IP to sub-system and then to SOC and laterally as well to undertake Portability & Vertical/Lateral Reuse of Single Test Intent Test Bench.

Portable Stimulus Standards (PSS) and Domain Specific Language (DSL) are Accellera® standards for Portability & Vertical/Lateral Reuse of Single Test Intent, graph-based and declarative environment for scenarios with concurrent, schedule, and sequential processing for platform independence. It is used extensively by Intel®, AMD®, Synopsys®, Cadence®, Siemens®, AMIQ®, etc., especially for Test Realization in SystemVerilog and C and enhancing scenarios with parallel & schedule activity, Data Flow Objects, User-defined data types and Coverage features.

What are the details of the program?

The Presentation will walk you through Concepts, Scenario, Test Realization and UVM Integration and deep dive into Library development as well as resolution of Security and multi-Core bottlenecks.

The discussions shall entail.

  1. Top level overview of PCIe Phy DUT/TB
  2. Reuse
  3. 3 Axis of Portability
  4. Declarative Language
  5. Graphs
  6. Concurrent/Parallel Scenarios
  7. Atomic Actions and Exec Statement
  8. UVM Sequence Item hooks
  9. Test Realization
  10. Integration to sub-system

Register @ http://siliconinterfaces.com/Registration.html

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April 28, 2023
8:00 AM - 9:00 AM