Portable Stimulus Standard and Domain Specific Language – Free, Online Presentation and Demo by Silicon Interfaces

From the United States to Japan, the word is out that to avoid multi spins functional simulation is not enough, especially to integrate Test Bench from IP to sub-system and then to SOC and laterally as well to undertake Portability & Vertical/Lateral Reuse of Single Test Intent Test Bench.

Portable Stimulus Standards (PSS) and Domain Specific Language (DSL) are Accellera® standards for Portability & Vertical/Lateral Reuse of Single Test Intent, graph based and declarative environment for scenarios with concurrent, schedule and sequential processing for platform independence. It is used extensively by Intel®, AMD®, Synopsys®, Cadence®, Siemens®, AMIQ® etc. especially for Test Realization in SystemVerilog and C and enhancing scenarios with parallel & schedule activity, Data Flow Objects, User-defined data types and Coverage features.

What are the details of the program?

The Presentation will walk you through Concepts, Scenario, Test Realization, and UVM Integration and deep dive into Library development as well as the resolution of Security and multi-Core bottlenecks

The discussions shall entail

1. Top-level overview of PCIe Phy DUT/TB
2. Reuse
3. 3 Axis of Portability
4. Declarative Language
5. Graphs
6. Concurrent/Parallel Scenarios
7. Atomic Actions and Exec Statement
8. UVM Sequence Item hooks
9. Test Realization
10. Integration to sub-system

Please register at http://siliconinterfaces.com/Registration.html

The time shown is for Pacific Time

#VLSI DESIGN #SEMICONDUCTORS #MICROELECTRONICS #DESIGN #VERIFICATION #PSS #DSL #Test Realization #CONSTRAINT #RANDOMIZATION #SIMULATION #Emulation