New Block Floating Point Arithmetic Unit for processing AI/ML Workloads in FPGA

Block Floating Point (BFP) is a hybrid of floating-point and fixed-point arithmetic where a block of data is assigned a common exponent. We describe a new arithmetic unit that natively performs Block Floating Point for common matrix arithmetic operations and creates floating-point results. The BFP arithmetic unit supports several data formats with varying precision and range. BFP offers substantial power and area savings over traditional floating-point arithmetic units by trading off some precision. This new arithmetic unit has been implemented in the new family of 7nm FPGAs from Achronix. We cover the architecture and supported operations of the BFP unit. In this presentation, artificial intelligence and machine learning workloads are benchmarked to demonstrate the performance improvement and power savings of BFP as compared to half-precision (FP16) operations.

ABOUT THE PRESENTER
Dr. Mike Fitton is senior director, strategy and planning at Achronix. He has 25+ years of experience in the signal processing domain, including system architecture, algorithm development, and semiconductors across wireless operators, network infrastructure and most recently in machine learning.