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Improving Converter Circuit Efficiency with Transient Simulation of Power Transistors During Circuit Operation
April 28 @ 10:00 AM - 5:00 PM
High performance power transistors are used in power management ICs, where switching behavior is extremely important. However, due to their large distributed gate and active area structure, accurately simulating switching activity to improve performance and minimize switching power loss can be challenging. Uncorrected current crowding from nonuniform current flows can cause chip failures and reliability issues.
In this webinar you will learn how Magwel’s PTM-TR co-simulates power transistor internal operation in converter circuits as they are simulated at SPICE level with SPECTRE. PTM-TR integrates with Cadence Virtuoso ADE to fully model 3D current flow and non-uniform distributed device switching in power transistors that can affect performance in power management circuits. PTM-TR’s Fast3D models are a 3D solver based model of the device layout allowing co-simulation of power devices to predict signal propagation in large gate nets, non-uniform switching of device fingers, as well as shoot-through current and current-crowding.
Magwel’s Application Engineer Allan Laser will present an overview of the tool flow followed by a demo that shows the features and capabilities of PTM-TR when used with Cadence Virtuoso ADE. Part of the demo will focus on visualizations of switching activity, showing non-uniform switching and current flow at various time points during transitions .