Getting Started with ANSYS PowerArtist

November 20, 2019

9:30 AM – 4:30 PM (PDT)

Venue:
ANSYS, Inc.
2645 Zanker Road
San Jose, CA 95134
USA

Contact:

Phoebe Lee

phoebe.lee@ansys.com

Join us for a free hands-on workshop to learn how to analyze, debug and reduce power early during RTL design phase using the industry-leading comprehensive RTL power solution, ANSYS PowerArtist. We will review:

• RTL Design-for-Power Methodology and basics of power calculation
• Performing RTL power analysis to get reliable power estimates that model physical effects
• Finding power bugs and hotspots using interactive visual debug and Tcl-based database queries
• Performing clock, memory and datapath RTL power reduction using power efficiency metrics and targeted RTL techniques
• Performing power profiling of real application activity scenarios to identify power-critical cycles
• Tracking power and power efficiency metrics via regressions

Please register early to reserve your seat, as seats are limited and available on a first come, first serve basis. Lunch will be provided.