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Full-Wave High Speed Signal Integrity Analysis with ANSYS HFSS 3D Layout
December 3 @ 11:00 am - 2:00 pm
December 3, 2019
11:00 AM – 2:00 PM (PST)
FREE to attend
2645 Zanker Road
San Jose, CA 95134
Join ANSYS for a free, hands-on “Lunch & Learn” that demonstrates the fully automated 3D electrical layout interface enabled in the latest version of ANSYS HFSS. As a complement to the traditional arbitrary 3D CAD-based modeling interface, the ANSYS HFSS 3D Layout interface is a significant productivity enhancement for IC Package and PCB designers. ANSYS HFSS 3D Layout allows engineers to easily create fully parametric models and perform design studies of printed circuit boards (PCB), electronic Packages and custom integrated circuits. In addition, the built-in parametric interface enables design engineers to explore design alternatives and evaluate design trade-offs prior to fabrication.
The hands on exercises will demonstrate how to Perform a High-Frequency Signal Integrity simulation on a PCB and Package including:
- Import board/package design file and choose nets to analyze
- Validate stackup and Auto creation of ports, boundaries and setup solution parameter
- Setup HPC options, solve the project and view Results
Please register early to reserve your spot. Lunch will be provided.