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Embedded Software Debug Using Integrated Codelink and Visualizer HW/SW Debug Environment

December 8, 2020

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Register For This Web Seminar

Online – Dec 8, 2020
8:00 AM – 9:00 AM US/Pacific
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Overview

Intuitive and easy to use, Codelink Software Debug Environment automates debugging for embedded software and correlates embedded software and hardware debug of complex SoC’s.

During debug, Visualizer with Codelink allows embedded software to be debugged using software debug techniques, including source code debug, assembly code debug, all while monitoring the CPU registers and memory, and correlating these with hardware debug. Hardware and Software debug in one integrated tool helps find bugs faster. The hardware debug contains all the power, speed and flexibility of the Visualizer Debug Environment. The software debug contains all the power that an embedded engineer needs, including source code debug, call stack windows, breakpoints, conditional breakpoints and watch points.

Because the software and hardware debug are integrated, events can be traced from software to hardware and back across the SoC.

Learn how you can save time and improve your embedded software debug techniques.

What You Will Learn

  • This session will take you through Embedded Software Debug tips and tricks in Post simulation.
  • Explore all Embedded Software debug windows with a demonstration.
  • Link and synchronize Visualizer debug windows with the Codelink Embedded Software debug. For example, source code value annotation in the embedded debug window (software variables) fully synchronized with wave window values.
  • How to use Visualizer with Codelink as an integrated HW/SW debug environment for debugging complex SoC’s.
ABOUT THE PRESENTER
Tomasz Piekarz

Tomasz PiekarzTomasz Piekarz is a Product Engineer for SoC Verification and Embedded SW Debug at Mentor Graphics. He has over 20 years of experience in functional verification, verification tools, methodologies and design of SoC. Mr. Piekarz holds a Masters in Electronic Engineering from The Silesian Technical University in Gliwice (Poland).

Who Should Attend

  • SOC Design & Verification Engineers
  • Engineering Managers
  • Program Managers

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