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Complete RTL to GDSII Flow for “Analog on Top” Designs

June 29 @ 9:00 AM - 10:00 AM

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Register For This Web Seminar

Online – Jun 29, 2020
9:00 AM – 10:00 AM US/Pacific
Online – Jun 29, 2020
5:00 PM – 6:00 PM US/Pacific

Overview

Mentor will highlight our Tanner Digital Implementer (TDI) tool, powered by the Oasys Digital Synthesis and Nitro Place and Route engines, and its integration into L-Edit, Tanner’s physical layout tool, to address the physical implementation of the digital needs of “Analog on Top” designs. More and more analog designs are becoming digitally-assisted resulting in more digital content to enhance analog capabilities, such as automated calibration and more programmability. TDI integration into L-Edit is the ideal cost-effective, easy-to-use digital synthesis and place and route solution. It addresses performance, capacity, time-to-market, power, and variability challenges. The tool is optimized for analog specialty process technology nodes at 22 nm and above to design an analog IC with a small amount of digital control or a more complex mixed-signal ASIC. The tool facilitates bringing together complex digital circuits with high performance analog interfaces to provide a complete flow.

What You Will Learn

  • How to synthesize and then place and route a digital block on a typical mixed signal design using the Tanner Digital Implementer product.
  • How to operate the Tanner Digital Implementer GUI from within the Tanner L-Edit mixed signal IC physical design environment
  • Key digital standard cell library file formats and how they’re used in the design flow.
  • The basics of the Nitro Reference Flow for customization and advanced functionality.
ABOUT THE PRESENTER
Sandra Kupperman

Sandra KuppermanSandra Kupperman is a Technical Marketing Engineer with the Tanner EDA product division of Mentor, a Siemens Business. Sandra is currently the Product Specialist for the Tanner Digital Implementer product. She holds a B.S. in Computer Science and M.S. in Engineering Technology from the University of Central Florida in Orlando, Florida. Her career in EDA spans 40 years and was previously employed by Harris Semiconductor, Cadence, Intel, and Synopsys. She has held many positions from EDA software developer, CAD engineer, CAD manager, Applications Engineer, and Account Manager of Technology in the IC physical design and verification space.

Who Should Attend

Designer, Layout engineer, Manager, and CAD engineer working on the implementation of digital circuits for “Analog on Top” designs.

Products Covered