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Cloud-enabled Workshop on “RISC-V based SoC design”

May 27 - May 31

$25

Welcome to Next-Gen VSD trainings

It’s finally here for all of you – RISC-V based SoC, open-source EDA, Physical Design, Custom Layout, STA, ngspice and Library characterization – All of them automated and connected in a single workshop platform, happening from 27th May to 31st May 2020

Content : 

– Study various components of RISC-V based SoC and review RISC-V picoSoC

– Understand importance of good vs bad floorplan and introduction to library cells

– Design and characterize one library cell using open-source Layout tool and spice simulator

– Do pre-layout static timing analysis and understand the importance of good clock tree

– Final steps for RTL2GDS

Here is the link for more details on this workshop –

Last day to register – 24th May 2020

https://www.vlsisystemdesign.com/upcoming-event/

Details

Start:
May 27
End:
May 31
Cost:
$25
Event Categories:
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Website:
https://www.vlsisystemdesign.com/upcoming-event/

Organizer

VLSI System Design
Phone:
8548037643
Email:
vsd@vlsisystemdesign.com
Website:
https://www.vlsisystemdesign.com