- This event has passed.
CDNLive Taiwan 2019
August 13, 2019
August 13, 2019
CDNLive Taiwan brings together Cadence® technology users, developers, and industry experts for networking, sharing best practices on critical design and verification issues, and discovering new techniques for designing advanced silicon, SoCs, and systems that transform the way people live, work, and play.
Tell Your Story
With increasing demands and growing complexities of circuits and systems, new challenges are ever emerging. Showcase your insights and solutions to key technical and industry issues at CDNLIve Taiwan. Cadence will feature high-quality presentations on topics including low power, reliability, and advanced node, and their applications in market segments such as AI, automotive, and high-performance computing. Submit an abstract for consideration at the 2019 conference.
|Call for Presentations opens||January 31 , 2019|
|Call for Presentations closes||April 15, 2019|
|Acceptance notification||April 30, 2019|
|Draft presentations due||July 1, 2019|
|Final presentation slides due||August 1, 2019|
Hot Topics for 2019:
- Mastering advanced-node design challenges
- Addressing automotive design and verification requirements
- AI design challenges and considerations
- Networking challenges from IoT to 5G
- Design and verification in the cloud
- Design, verification, and integration of SoC interface IP
- Portable stimulus from simulation to silicon
- Analog/mixed-signal SoC verification
- RF IC and RF module design
- Simplifying functional verification with Verification IP
- Advanced packaging and cross-platform solutions
- PCB design for manufacturing and testability
- Managing your PCB critical signal return paths
- Silicon photonics
- Vision/audio processing
- Low power for SoC and system design
We are seeking presentations on design topics that illustrate your experiences with Cadence® products, solutions, flows, methodologies, and techniques as described below.
Cadence technologies: Presentations should share experiences with Cadence technology and illustrate exciting ways in which design and verification teams have successfully used these technologies on their most recent projects.
Design methods and case studies: Presentations should describe innovative methodologies or specific examples that highlight design flows using Cadence methodologies to develop cutting-edge silicon, SoCs, and full systems.
Design techniques: Presentations should describe interesting and innovative design experiences related to specific design projects. These submissions should be more “how to” in nature, include a brief description of the design, and discuss methodology, flow, and innovative use models.
Abstract submissions should be no more than 2,500 characters, clearly stating the significant contribution, impact, and results of the submission. All abstracts will be reviewed. Authors of accepted presentations must sign a copyright release form for their presentation. Notice of acceptance will be sent via email.
Examples of last year’s presentations can be viewed here.
Should you have any questions about abstract submissions, please email email@example.com.