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“CAPTURE THE BUG”- A Design Verification Hackathon

July 15 - August 1

To provide a basic hands-on for design verification, which enhances practical verification knowledge. The verification challenge helps to understand the verification intent to detect bugs in designs, understand debugging and fix the buggy designs. It provides a practical exposure to real world design verification activities
The hackathon aims to generate skilled manpower in the domain of Design Verification, which will strengthen the quality of designs being manufactured. It reduces chip failure, improving the time to market cycle of Semiconductor products.
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Details

Start:
July 15
End:
August 1
Website:
https://nielithackathon.in

Organizer

VLSI System Design
Phone:
8548037643
Email:
vsd@vlsisystemdesign.com
View Organizer Website