CadenceTECHTALK: In-Design EM Analysis Addresses RF System Integration Challenges

Date: Tuesday, September 20, 2022

Time: 10:00am PDT / 1:00pm EDT

The RF PA MMIC worked as designed until it was integrated into the module housing, and then the overall performance shifted out of spec. Design failure at the point of system integration is a common cause of delayed product deliveries and engineering cost overruns.

Late-stage design concerns discovered during system integration are a common cause of delayed product deliveries and engineering cost overruns. Learn how challenges related to MMIC/RFIC integration can be identified and resolved prior to tapeout through in-design EM analysis and MMIC/RFIC co-simulation using distributed, multiprocessing EM analysis for large-scale RF structures with the Clarity 3D Solver and AWR Microwave Office circuit design software.

Speakers:

David Vye, AWR Product Manager, Cadence

Christian Bean, Sr. Principal Application Engineer, Cadence

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