Bridging Analog and Digital worlds at high speed with the JESD204 serial interface (Live Webinar)

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In this live webinar, we will take a look at the history and revisions of JESD204 to provide an understanding of the standard, the use cases, and its future, followed by an overview of the key features of the standard, useful for system architects and system integration engineers. We will also touch on a few traps and pitfalls we have overcome in numerous projects we have integrated over the years with the aim of raising awareness of common design issues and preventing potential issues in system bring-up. Finally, you will learn about Comcores’ silicon-proven JESD204 solutions and how we can customize them to your project needs and accelerate your project developments and reduce hidden risk and cost.

Piotr Koziuk Bio:

I’m a father to 3 brilliant and fantastic daughters. Regardless of my career accolades, this will always be my life’s greatest reward. I have 10 years of experience designing and implementing JESD204 IP Cores, started with the standard as a Digital Design RTL engineer in 2012 and worked on the 204A and 204B, lead a team of engineers as Technical Lead from 2018 on the 204B and 204C, and now hold a role as the Product Manager at Comcores Chip to Chip interfaces portfolio since 2021. I am also a member of the JEDEC TG16-4 task group standardization committee for JESD204 D.

*This webinar is in partnership with SemiWiki and Comcores

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