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2.5D/3D IC Packaging Verification
August 7, 2019 @ 10:00 AM - 3:00 PM
Do you want to find out, hands-on, how many of the leading fabless semiconductor companies are verifying their complex 2.5/3D heterogeneous and homogeneous package assemblies? Here is your chance to meet our technical staff and ask your questions. Come and see why fabless semiconductor companies are adopting this flow, irrespective of the Package layout tools they use.
What You Will Learn
You will hands-on drive the Mentor flow for Advanced IC Package assembly verification using Xpedition Substrate Integrator and Calibre 3DSTACK. You will construct a 2.5D design in Xpedition Susbtrate Integrator and then drive Calibre 3DSTACK to perform complete DFM, LVS and LVL verification.
Who Should Attend
- IC Package designers
- IC Designers responsible for package/IC verification
- IC Verification engineers who use Calibre
- IC Package architects responsible for package selection