There are tectonic changes happening in the world of FPGAs. A lot has changed since their introduction in the 80’s. Back then they were mostly used to implement state machines or glue logic. Subsequently they grew more complex with the addition of high speed IOs, eRAM, DSPs, other processors and other IP. More recently though FPGAs have come into the limelight because of their ability to help solve today’s data processing challenges. These include enhancing data center throughput and accelerating machine learning applications.
One person who has witnessed many of these changes is Manoj Roge, Achronix Vice President of Strategic Product Planning. During his career he has worked at both Xilinx and Intel (Altera) in strategic positions. I had the pleasure of talking with him about the changing landscape for FPGAs recently.
Microsoft showed with their Catapult project that FPGAs are extremely useful for accelerating datacenter workloads. This comes at a good time because CPU performance scaling is slowing due to the end of Moore’s law improvements previously provided by generational process improvements. Even multiprocessing using CPU architectures is not meeting the computational needs of today’s applications.
FPGA are inherently parallel and offer fewer constraints in many applications than GPUs. One of the big factors that helped GPUs grow in market share for general computing applications was the readily available development tools that allowed programmers to move applications to that platform. Similarly, Manoj pointed out during our conversation, FPGA programming is moving from RTL to coding languages like C++ and Python. This will have the effect of opening up the benefits of FPGA throughput to a much larger pool of application developers. Manoj was adamant that the quality and usability of development tools for FPGAs is crucial, especially now that the audience has expanded to include coders and not just hardware engineers.
According to Manoj, the other factor leading to the increased usage of FPGAs is the enormous mask costs for advanced nodes such as 16nm and beyond. It’s not unusual for a mask set to costs upwards of $10M. These higher costs are pushing system designers to build fewer, but more generally applicable, ASICs. Adding programmability to an ASIC through embedded FPGA is an ideal way to accomplish this.
Achronix is unique in having an embedded FPGA fabric. In concurrent with increasing masks costs, the cost per LUT has gone down, making the use of FPGA fabric for this purpose feasible. The dual advantage of embedded FPGAs are lower power and lower latency. Manoj pointed out that there are a number of papers that show a 10X reduction in power when the need to go off-chip is eliminated. The power overhead of driving IOs and maintaining signal integrity in board traces is huge. An on-chip embedded FPGA fabric avoids these power sinks. Latency also goes down with embedded FPGA fabric. Many applications call for microsecond scale latency, and an embedded FPGA fabric can deliver this.
Manoj told me that eFPGA is ideal for the new compute workloads found in AI/ML such as image classification and video recognition, real time video transcoding (4K/HD), 5G backhaul and baseband radio, and smart city and smart factory. While these systems may initially rely on off chip FPGA, as volumes ramp up on-chip FPGA becomes increasingly attractive.
FPGAs have a major role to play in the most advanced computing systems being used for the tide of emerging applications. Manoj sees that Achronix will be playing a major role in these markets. There is more information about Achronix eFPGA on their website.