Accelera Technical Excellence Award

Accelera Technical Excellence Award
by Paul McLellan on 11-30-2012 at 3:46 pm

 The Accellera Systems Initiative, most well-known for driving the standardization of various aspects of Verilog and SystemVerilog before handing the standards off to the IEEE, has announced that nominations are open for the 2013 Technical Excellence Award. This recognizes outstanding contributions in the creation of EDA and IP standards by a member of an Accellera technical committee. Nominations will be accepted through January 18th.

More details of the nomination process are here, including a link to the online form for nominations. Any individual who is a member of an Accellera technical committee is eligible.

The Technical Excellence Award will be presented during a lunch at Accellera Systems Initiative day, a featured part of DVCon 2013 taking place February 25-28, 2013 at the DoubleTree Hotel in San Jose, California.

Current technical standarization work by Accelera includes:

  • Analog/Mixed-Signal extensions to Verilog (Verilog-AMS)
  • Analog/Mixed-Signal extensions to SystemC™ (SystemC-AMS)
  • Configuration, Control and Inspection (CCI) standards for SystemC
  • IP Tagging for data-driven tracking of soft IP
  • IP-XACT™ metadata standard for IP integration
  • Open Verification Library (OVL) assertion library
  • Standard for Co-Emulation Modeling Interface (SCE-MI)
  • Synthesizable subset of SystemC
  • SystemC language standard
  • SystemC Verification (SCV) library
  • SystemRDL
  • Transaction-Level Modeling (TLM)
  • Unified Coverage Interoperability Standard (UCIS)
  • Universal Verification Methodology (UVM™) standard